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The IWLPC Technical Committee is pleased to announce the Best of Conference, Best Presentation & Best Papers in WLP, 3D, Advanced Manufacturing and Test tracks as chosen by the technical committee and attendees. Papers were evaluated based on technical merit, relevance, originality, knowledge of subject, quality of material, and quality of presentation.
The Best Presentation of Conference was awarded to Robert Hubbard, Ph.D., Lambda Technologies, Inc., for his presentation "Failure Relief in FOWLP Polymer Layers."
Arnita Podpod, IMEC, won Best Paper of Conference for the paper "High Density and High Bandwidth Chip-to-Chip Connections with 20µm pitch Flip-chip on Fan-Out Wafer-Level Package" which also won the Best 3D Track Paper award.
The Best WLP Track Paper went to Jae Cho, Ph.D, GlobalFoundries, for "Chip Board Interaction Analysis of 22-NM Depleted Silicon on Insulator (FD-SOI) Technology in Wafer Level Packaging (WLP)."
The Best Advanced Manufacturing Track Paper was awarded to Habib Hichri, Ph.D., SÜSS MicroTec Inc., for the paper "Fine RDL Formation Using Alternative Patterning Solution for Advanced Packaging."
All papers from the conference proceedings are available in the SMTA Knowledge Base as well as the IEEE Xplore Digital Library. The proceedings can also be purchased in the SMTA Book Store.
IWLPC brings together the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV and integrated system packaging.
Going into its 16th year, the IWLPC is co-produced by Chip Scale Review, the leading international magazine addressing the semiconductor packaging industry, and SMTA, the distinguished global association representing electronic assembly and manufacturing professionals.
The conference comprises three parallel technical tracks with two full days of presentations on wafer-level packaging, 3D integration, and advanced manufacturing and test. Professional development courses, keynote speakers, and panel discussions are offered by world-class experts and enable attendees to broaden their technical knowledge. The technical program includes a two-day expo where 75 exhibitors showcase their latest technologies and products. The conference provides a collective network of over 800 industry professionals, including vendors from leading semiconductor companies, foundries, and OSATS, as well as key technology, equipment, and materials suppliers in the exhibit area. Attendees will be inspired by the quantity and quality of the featured new developments and emerging technologies. The 16th Annual Conference will be held October 22-24, 2019 in San Jose, California.