Reading time ( words)
In the final column in this three-part series, Vern Solberg discusses methodologies for flip chip mounting, including solders, gold and adhesives or GGI, and the impact of residues and underfill. In regard to assembly processing, positional accuracy, repeatability, and placement speed are critical factors when matching the system to the specific application.
Several process methodologies currently can achieve flip-chip mounting, depending on the contact alloy furnished on the device. In regard to assembly processing, positional accuracy, repeatability, and placement speed are critical factors when matching the system to the specific application. For bumped die devices with only 100- to 250-µm pitch, placement accuracy of 10 to 12 µm may be most practical. Array devices with > 300-µm pitch will have less critical requirements of 25 to 50 µm.
As noted in Part 2 of this column, the flip-chip device contacts may be spherical, column-shaped, or simply a raised alloy bump feature. The most common contact material furnished on the very fine-pitch flip-chip configured die uses a combination of alloys that are compatible with mass reflow solder processing. The solder connection process for flip-chip configured die begins with pickup and machine vision inspection of the device outline. Flux is applied either to the device contacts using a dip-transfer process or directly onto the contact pattern on the substrate. The flux developed for this process is typically sticky enough to hold the die in place prior to reflow soldering. This reflow solder process has proved ideal for fine-pitch perimeter or array flip-chip devices with eutectic or near-eutectic solder ball or bump contacts. However, if the component is furnished with a non-collapsing (high-lead or solid alloy) contact, a volume of solder alloy must be furnished on the circuit contact sites. Solder paste can be applied using stencil printing, solder dispensing, or solder-jet deposition. A very fine powder size solder paste material is available for dip-transfer as well.
When a specific volume of solder is needed, the circuit board can be prepared using a solid solder deposition (SSD) process. The SSD-prepared boards can be furnished with or without a tacky flux already applied to the solder prepared lands. If no flux is furnished on the board, the devices can be dipped into a flux reservoir as noted above, or flux can be dispensed onto the substrate prior to device placement.
For long-term reliability, the solder alloy composition selected must be compatible with the contact alloy and surface finish supplied on the mounting structure. In addition, temperature and the cycle time required for soldering vary greatly. Most of the components in the market today are being furnished with lead-free alloy contacts. The tin/silver/copper (SAC) Pb-free alloy compositions become liquidus at a temperature range around 218-220°C — significantly higher than the traditional eutectic tin/lead (Sn/Pb) alloy compositions — and, depending on the mass of the assembly being processed, time duration for completing the joining process may need to be extended. The specific profile developed for the assembly will be somewhat dependent on a number of factors:
- The mass of the unit to be reflow soldered: Physical mass can influence the ramp rate and must be calibrated to ensure the surface lands reach the ideal temperature for solder wetting.
- The outline of the components and contact size: A smaller unit mass typically requires less energy and time to reach the optimum reflow wetting temperature.
Depending on the contact diameter and land pattern geometry, lead-free alloy and eutectic alloy contacts can collapse slightly during solder processing. If maintaining a consistent stand-off height after solder processing is necessary, users may consider an alternative ball contact alloy that will retain its shape after solder attachment. For example, the higher melting or liquidus point of the Pb90/Sn10, (a lead-alloy-dominant composition) is compatible with tin/lead eutectic solder alloy for assembly processing. Because of the lower liquidus temperature of the eutectic compositions (ranging between 179° and 183°C), the Pb/Sn contact will not collapse during reflow solder processing.
Gold Ball Attach
The flip-chip die can also be furnished with noble alloys; gold is the most common. Gold bump contacts are typically furnished via a wire-bond process, where a gold ball is first formed by melting the end of the wire (which is held by a bonding tool known as a capillary) through electronic flame-off. The resulting ball has a diameter ranging from 1.5 to 2.5× the wire diameter. The ball is then brought into contact with the bond pad on the die. Adhesion of the gold ball relies on precise pressure, heat, and ultrasonic forces needed to form the initial metallurgical weld between the ball and the bond pad. The wire is immediately broken away from the ball feature followed by a coining process to maintain a uniform contact profile. The gold bumped die is commonly attached to the substrate or PCB using an anisotropic conductive polymer adhesive.
The adhesive can applied onto the substrate over the entire surface that the chip will cover. This greatly facilitates anisotropically conductive adhesive placement, as excess adhesive will not bridge adjacent contact lands. By covering the entire surface of the chip, adhesion is improved and cleaning and underfill steps are eliminated. The first technique uses materials supplied in film form. These are cut, placed, thermally tacked onto the substrate, then placed with heat and pressure applied, sufficient to either tack or fully cure the adhesive. ‘Tacked’ interconnections are fully cured in a separate, dedicated piece of equipment; cooling is frequently done under pressure to ensure good electrical contacts.
The second technique to attach gold-bumped die uses materials supplied in paste form, which can be applied to the substrate by stencil or screen printing techniques. Devices are commonly placed into the paste using pressure on the back side of the chip in the alignment machine while the adhesive is cured by heat or UV light. An alternative approach has been developed to use a batch curing fixture, freeing the placement machine from the throughput-reducing process of curing the interconnections under pressure.
The anisotropically conductive adhesive paste can also be stencil printed onto the substrates. Flip-chips are placed into the paste with no additional pressure requirements. Curing is performed in the batch curing fixture that applies both heat and pressure to cure multiple device assemblies simultaneously.
The significant advantage of anisotropic material is that its curing temperature is only a fraction of that needed for reflow soldering. Regardless of the application technique, all anisotropic conductive adhesives conduct only in the Z-direction (i.e., perpendicular to the plane of the substrate.)
An alternative non-solder process relies on a gold-to-gold interconnect (GGI) process. Flip-chip attachment using the GGI process requires a special die placement system that utilizes very controlled heat and pressure to complete the joining process. These systems typically include ultrasonic or thermosonic energy to complete the weld between the gold ball contact and the gold-plated surface on the land pattern.
Cleaning and Underfill Decisions
In regard to solder attachment, processes that utilize solder with either a no-clean (leave-on) flux residue or a water-soluble flux residue cleaning process are preferred. The goal is to minimize or eliminate harmful flux residue contaminants remaining post-soldering. In flip chip applications where a non-corrosive rosin-based flux or paste is used, the flux residue may not need to be removed. Low-residue soldering fluxes achieve the best balance of soldering when the residue is equal to or less than 20% of the applied flux. Because of the differences in the thermal coefficient of expansion (CTE) between the silicon die and the typical glass-reinforced resin-based substrate, localized reinforcement in the form of a resin-based underfill is often required. Smaller die (< 5.0 × 5.0 mm) may not require underfill; larger-area die will be more susceptible to physical stress during thermal excursions experienced during operation.
Types of underfill include capillary flow underfill, no-flow/fluxing underfill, and removable and reworkable underfill. Capillary flow underfill is the most common, generally dispensed at one or two edges to spread through a capillary flow to the opposite edges of the die. Applying underfill can enhance solder interface reliability of the flip-chip component up to 10×. Epoxy underfill will also protect the silicon edge surface from mechanical contact damage and provides a physical barrier to moisture, humidity, and chemical contamination. The material restricts solder creep typically prompted by thermal cycle stress between adjacent solder bumps. IPC J-STD-030, “Guideline for Selection and Application of Underfill Material for Flip Chip and Other Micropackages” provides underfill material users with a general guide to selection and application of underfill. Further information regarding assembly process methods, rework techniques, and end-product qualification test methods are detailed in IPC-7094, “Design and Assembly Process Implementation for Flip-Chip and Die-size Components.”
Vern Solberg, an SMT Editorial Advisory Board Member, is a technical consultant specializing in surface mount and microelectronic design and development. Additionally, Vern holds several patents for IC packaging innovations and is a member of many industry organizations, including IPC, IMAPS, SMTA, and the JISSO International Council. He may be contacted at (408) 568-3734; firstname.lastname@example.org.
SMT, April 2010