New PCB Design and Device Programming Products
April 26, 2010 |Estimated reading time: 10 minutes
— These design and device programming tools enable easier PCB assembly test, less complicated design updates, faster design, and easier integration of oddform components, among other benefits. Products come from ATS, EMA Design Automation, Numerical Algorithms Group, Stratford Digital and LogicSwap, ASTER Technologies, DfR Solutions and ARINC, Zuken, BPM Microsystems, and AVX.Design Engineering and Analysis with Heatsinks
Hardware and engineering services will provide design engineers with a fixed price for the complete set of heat sinks required to cool any PCB. The QoolPCB program offers customers a single fixed price for all the design engineering services, thermal analysis, heat sink hardware and attachment devices, as well as testing and verification costs for any PCB. The program is designed to reduce product development costs, speed time-to-market, and ensure thermal reliability. Fixed pricing of the QoolPCB program includes standard off-the-shelf heat sinks and hardware as well as custom heat sinks, including tooling charges, sample production, and custom attachment hardware, if required, to bring individual components within their manufacturer-designated operating temperatures. To participate in the QoolPCB program, PCB design engineers provide a 3D CAD model of their PCB layout, along with technical specifications and power dissipation limits for all board components. ATS engineers perform a complete thermal analysis of each PCB, and develop a comprehensive cooling solution for each component on the board, using more than 3,000 standard heat sink designs available in-house at ATS; or custom heat sink designs, if required. After the design phase, ATS verifies the cooling design by performing test procedures at its Thermal Characterization Laboratory (including advanced open- and closed-loop wind tunnels, temperature and velocity measurement sensors, and other analysis). Complete design specification, performance data and test results are provided. ATS provides all sample heat sinks at no extra charge. Pricing for the ATS QoolPCB program is based on the number of heatsinks required per PCB layout. Advanced Thermal Solutions (ATS), http://www.qats.com/Services/QoolPCB-Fixed-Cost-Board-Cooling-Program/57.aspx
FPGA Design and Simulation Bundles for OrCAD Users
Robust FPGA design and simulation bundles for OrCAD users provide a complete flow for PCB and FPGA design. The OrCAD FPGA System Planner enable designers to integrate the FPGA onto their boards. Including Aldec Active-HDL in these bundles enables users to design and verify the FPGA itself, providing multi-language design entry and simulation for FPGA logic. The increased functionality and performance available within today’s FPGAs have resulted in a growing use of programmable logic across all areas of electronic design. While this has led more design teams to select an FPGA based implementation, this additional functionality presents a rising design and verification challenge. The OrCAD/Aldec FPGA Bundles provide the tools needed to handle the increasing complexity of FPGA development. Going beyond typical vendor-supplied simulators, these bundles deliver a scalable vendor-independent platform to accommodate even the most complex mixed-language FPGA verification tasks. The Aldec simulator reportedly provides a significant speed increase and contains no limitations on design size. EMA Design Automation Inc., www.ema-eda.com
NAG Library for SMP and Multicore
Mathematical and statistical algorithms optimized for performance on multicore architectures have become key to progress in various aspects of numerical computations at the core of electrical engineering research. The NAG Library for SMP and Multicore contains over 1600 routines, including over 100 new for this release. A complete listing of these routines can be found at http://www.nag.com/numeric/fl/FSdescription.asp. The NAG Library is used for work on multiple cores because of the reliable parallel design of the algorithms, and the common interface for both serial and multicore libraries. This enables users to speed up their code on many multiple core architectures with greatly reduced effort. The NAG library for SMP and Multicore also has been designed to make it easy to move those applications that currently call serial routines into the parallel world, by the use of common calls and common documentation. Numerical Algorithms Group (NAG), http://www.nag.com/downloads/downloads_entry.asp
CAD Migration
A new family of tools and services is available to migrate designs from all major CAD tools into CadSoft EAGLE. The first stand-alone tool will convert schematic and PCB designs from the obsolete PCAD platform to EAGLE. Upcoming releases will support other major CAD tool design and library conversions. The standalone tool is a windows executable that will convert existing PCAD designs into a native EAGLE format. Any features that may not translate perfectly into EAGLE are highlighted for the user to review. These tools will follow the EAGLE principle of scaling license cost with the design complexity. Two versions to match the capabilities of EAGLE: Standard and Professional. Users with less-complicated designs will pay a lower cost for the conversion tool. This conversion is also being provided as a service. Conversion services are offered from all major CAD platforms: Allegro, Altium, BoardStation, Cadence, CADSTAR, CR-5000, Expedition, Orcad Layout, PADS, Protel, and Visula. Stratford Digital, www.eaglecentral.ca and LogicSwap, www.logicswap.com
DfT Software Combines Electrical and Mechanical Analysis
TestWay design for test (DfT) software combines electrical and mechanical analysis, developed to address shrinking release cycles, budget compression, and improvement in product quality. The probe analyzer is an interactive, rules-based routine used by the layout engineer or test developer to identify any possible probe location based on the copper surface, which is useable for a physical access. Access constraints, spacing checks, test points assignment, use of the largest probe size, pin offset and Agilent's bead probes are taken into account in accordance with company-specific guidelines. Once the potential probe placement has been identified, TestWay can estimate the test coverage for ICT and FPT based on the measurement capabilities of the targeted test equipment. The probe analyzer also generates a comprehensive accessibility report that clearly states whether adequate probe locations were identified for each net, highlighting mechanical rules violation, so that this information can be fed back to design to support improvements. By reading the access report interactively with the layout viewer, color coding is used to assist the design and test engineer to graphically browse the non-testable nets in the design. TestWay provides a sophisticated level of coverage analysis by allowing users to define the test line and combine ICT or FPT with complementary test techniques such as AOI, AXI, BST, FPT, ICT, MDA and Functional Test. It estimates the theoretical coverage aligned to various test strategies, prior to test development, to identify areas where test coverage can be improved, so that electrical rules could be applied to identify DfT violations that limit the test efficiency. The ability to estimate coverage that is aligned to the mechanical layout constraints of the PCB, allows users complete visibility of what can realistically be achieved, so that the effectiveness of the completed test programs can be realized. ASTER Technologies, www.aster-technologies.com
Reliability and DMSMS Support
DfR Solutions and ARINC created a partnership to provide combined reliability and DMSMS support to the commercial government and defense industries. ARINC’s DMSMS support has been used for logistics planning throughout the project lifecycle. They have worked with industry, government and defense to implement sound obsolescence management programs before sustainability and operational availability problems are even apparent. Their obsolescence management practices allow managers to maintain or minimize program costs through planning and insight into how their design relates to industry roadmaps and availability predictions. DfR Solutions’ physics-based approach allows them to be current with emerging technologies, understanding how components and assemblies are likely to perform prior to prototype. Automated Design Analysis (ADA) software combines ARINCs DMSMS experience with DfR Solutions’ Automated Design Analysis tool, enabling performance-based logistics with the ability to design in reliability and obsolescence mitigation techniques. DfR Solutions, www.DfRSolutions.com and ARINC Incorporated, a portfolio company of The Carlyle Group, www.arinc.com
Flexible Replication and Design Reuse
CircuitSpace version 4.0 offers advanced placement and design reuse capabilities along with other features to help expedite the PCB layout placement process. The flexible replication and reuse capabilities enable users to fully leverage their design IP, even if there are differences between designs. New to CircuitSpace 4.0 are template viewing and cluster mirroring capabilities. The template viewer is a complete graphical user interface (GUI) enabling the designer to see the parametric information for each component along with an image of the template. This allows designers to review their reuse template graphically before they apply it to the design. The ability to mirror clusters allows templates to be applied where the master component is mirrored, to apply a template etch to a cluster that has been mirrored, and provides the ability to propagate etch from/to clusters that are and are not mirrored. Other enhancements in CircuitSpace 4.0 include a swap cluster command, support for clustering based on a PDF version of the schematic, enhancements to the compare checkpoint report to support testprobe information, and more. Crossprobing tools allow for joint review of the board and a PDF of the logical schematic. EMA Design Automation Inc., www.ema-eda.com
Migration from PADS to CADSTAR
The new function enables old PADS designs to be maintained in CADSTAR (12.0) for changing requirements or easy management of part obsolescence, while also facilitating re-use of tested data in new PCBs. Problems can occur when components within an established PCB design become obsolete and can no longer be sourced. Managing the update within these legacy designs can be time consuming. By migrating all the design data into CADSTAR, users can manage this process more efficiently with automated processes. Users can assess how they can extend their PCB design skills into new areas that include schematic capture, through FPGA programming, final PCB design, 3D board design and clearance checking, dynamic links to MCAD designs and design release to manufacture, all within a single design environment. Users have the option to continue using their older PADS designs while making use of the CADSTAR Schematics and PCB design solution available as standard. The solution targets designers working for the industrial, medical, automotive, aerospace, and defense industries that often have product lifetimes of up to 30 years. Zuken, www.zuken.com/cadstar-migration
Flash Memory Programming System
The latest-generation Flashstream Flash Vector Programming System, the Flashstream 2800F-MK2 combines 16 GB memory capacity with 64-bit architecture, with full data capacity support for devices larger than 4 GB. The Flashstream 2800F-MK2 currently supports device data files up to 125.5 Gb with theoretical device size support up to 8 Eb. The Flashstream’s individual socket cards and receptacle socket options help reduce cost per device. With receptacle-based socket cards, worn or damaged sockets can be efficiently replaced by swapping out only the individual failing socket. Flashstream can support all of the latest flash memory device architectures and package types. The company will continue to offer the 2800F with the 4 GB memory. Flashstream is available as a manual production tool with models 2800F and 2800FMK2. For automated production, the HelixFS and the 3000FS offer medium- to high-volume production solutions for flash memory programming. BPM Microsystems, http://goo.gl/Tsa7
PCB Design Software E-Training in America
Zuken in America launched an e-training package for its PCB design product, Design Gateway. This training package is more cost-effective and flexible than group classroom-based training. The course, which is split into nine chapters, runs for three hours online, with additional off-line tasks. Estimated completion time is six hours. Throughout this interactive course, narrated PowerPoints, AVIs, and quizzes ensure e-learners stay engaged and information is absorbed and retained. At the end, a course completion certificate is supplied. Zuken also provides specialist support to address questions as required. Zuken, http://www.zuken.com/movies/DG-eTraining/player.html
Tantalum Capacitor Simulation, Modeling, and Selection Tools
SpiTan III, with significant enhancements for simulation and modeling of tantalum capacitors, includes new features such as the effects of temperature and voltage on DCL leakage current, equivalent circuits of capacitors with parameter values, and more than 80 new released codes have been added. SpiTan III can be freely downloaded at http://www.avx.com. AVX has also developed a library of models of its tantalum capacitors. Five of the most common case sizes (A, B, C, D, E) are now available in STEP (Standard for the Exchange of Product Model Data) format, which is widely used and popular for data exchange and archiving. Models can be downloaded from AVX' web pages. In addition, AVX has updated its SelectCap capacitor selection program to include all parts released in 2009. AVX Corporation (NYSE:AVX), http://www.avx.com
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