New Design Products

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Following are design software packages and upgrades that simplify, automate, and otherwise improve PCB design, design for excellence (DfX), and other aspects of new product introduction. Software Licenses and Updates

Two new bundles for CADSTAR help companies keep the software up-to-date at a minimum cost. The Take Care bundles called CADSTAR DYNAMIC and CADSTAR KYNETIC comprise a license for the software plus a Take Care package that includes regular software updates, access to the online CADSTAR libraries, and support. The bundles are designed to simplify and streamline the PCB design flow. They will include regular software updates and new features along with 24-hour online and local support from the CADSTAR distribution network. There is also 24-hour access to the online CADSTAR libraries containing over 240,000 CADSTARparts and symbols. Both bundles feature three year upgrade and support. Zuken, for Miniaturized Designs

The latest release of Cadence Allegro and OrCAD printed circuit board (PCB) software offers new features and functionality designed to boost productivity and performance for PCB engineers. The Allegro and OrCAD PCB Design Release 16.3 includes the ability to miniaturize the footprint of end products and reduce the number of physical prototype iterations, making the design cycle more predictable. This release addresses increased functional and interconnect density through improvements for rigid-flex routing, extended high-density interconnect (HDI) rules, 3D viewing of PCBs and asymmetrical clearance for RF circuits. Extended micro via stacking rules allow users to create the most difficult HDI designs, and multi-line curved bus routing that hugs the flex outline accelerates the creation of rigid-flex designs. An integrated 3D PCB viewer gives visibility into components and HDI micro via breakouts. The Allegro PCB RF Option also helps speed the time to create accurate RF circuits through the use of asymmetrical clearances for one or more RF elements. Also featured in the 16.3 release are a number of significant productivity and usability improvements to the OrCAD family of products. OrCAD Capture CIS, for instance, now offers autowire capability to quickly add connections, as well as new 3D footprint viewing. OrCAD PCB Editor provides 3D viewing and flip-board design/editing and jumper support for single-sided PCB designs. OrCAD Signal Explorer has a revamped user interface, with drag-and-drop and copy-and-paste functionality, context-sensitive RMB functions and native IBIS model support. Usability improvements are another focus of the latest Allegro PCB Signal and Power Integrity software, which offers a new user interface and adds stack-up-aware capabilities to the pre-route analysis environment. Buffer modeling standards are embraced through native IBIS and SPICE support, including Cadence Virtuoso Spectre Circuit Simulator models. Another improvement that boosts design cycle management is the ability to quickly scan a PCB with dozens of multi-gigabit signals and quickly determine where detailed analysis should be applied as signals are ranked according to their signal-to-noise ratio. Other key issues addressed are associated with part data management. Integrated ECAD, MCAD part creation, generation and distribution reduce unnecessary physical prototype iterations. The new part introduction capability extends management, notification of pre-release and temporary parts to shrink the design cycle. In addition, engineers can implement part updates automatically based on approved, recommended replacements, ensuring quality of results through obsolete part tracking. The Allegro and OrCAD PCB Design Release 16.3 will be available for download by customers in early December 2009. Cadence, Self-paced Training Program

A free, Web-based training program aims to help designers of electronic and electrical equipment. From electrical basics to detailed descriptions of circuit protection strategies, Circuit Protection University (CPU) provides a suite of practical, self-paced tutorials. The CPU site launch includes an overview of circuit protection devices and tutorials on overcurrent and overvoltage protection techniques. Additional courses cover coordinated circuit protection and I/O port protection. The training program includes real-world examples of circuit protection solutions for consumer electronics, including cell phones, batteries and charging systems; laptop computers and multimedia equipment; set-top boxes and high-speed communications equipment; automotive infotainment equipment; and more. The CPU virtual training program uses examples and analogies to explain how overcurrent and overvoltage protection devices help prevent injury, protect electrical equipment from damage, and help maintain uninterrupted device performance. Helpful resources include a glossary of terms and an overview of Tyco Electronics' circuit protection products, as well as a knowledge-evaluation quiz at the end of each module. Tyco Electronics Ltd., Advanced Product Data Management 

The 5.1.2 version of CXInsight is an integrated, one-stop product for project and product design data management in the electronics design and manufacturing industry. This release delivers added e-collaboration functionality including improved server-to-server connectivity, advanced bill of materials (BOM) merge capabilities, user-friendly tools and updated communication technology for the Internet. CXInsight 5.1.2’s tool set provides effective internal and external collaboration between project members across OEM and manufacturing sites through dynamic, real-time and secure e-collaboration effective communication (128 bit encrypted, binary compressed). Feedback is enabled through the firewalls between the design and manufacturing teams as well as all the other partners in the supply chain over the net. A seven-layer safety structure guarantees an secure collaboration environment based on a project room methodology. This latest release brings further connectivity capabilities in addition to client/server, CXInsight now supports full server-to-server connectivity for distributed PLM in the supply chain. Distributed PLM allows partners in the supply chain to be linked online to projects that they have been invited to by the project owner, creating a dynamic data chain between the different CXInsight servers, whereby the data is only in one location. Most members have restricted access rights to the project where they will find information that is only relevant to them, and different members can work concurrently on a particular project. An updated ODB++ (tgz) offers easier interface; BOM import allows full traceability and reuse of all content. A dedicated product data and manufacturing information management system is configured to work across all disciplines from design, engineering and assembly. As a manufacturing information management system, CXInsight 5.1.2 works down to the factory floor, distributing production files, with full version control, to the processes involved. This offers full product data management capability from which stable product data sets can be uploaded in the enterprise-wide formal PDM systems when required. Adeon Software House, or

S-Parameter Support for SI Analysis

Support of S-Parameter based circuit models is available in the latest version of high-speed design and verification environment CR-5000 Lightning, revision 12.0. This extends the capabilities of SI simulation to include new application areas, and simplifies the process for layout engineers unfamiliar with S-Parameter based modeling. To analyze high-speed signals in applications featuring DDR2/3 or USB technology, accurate models for components such as common-mode filters, baluns, and connectors are required, and simple RLC models are no longer appropriate. Accurate simulation at frequencies into the multi-gigahertz range is required, using models that reveal the minimum amount of information about the internal component structure. S-Parameters suit this purpose, representing the transmission and reflection behavior of waves at specific frequencies, using industry-standard formats such as Touchstone, which has also been adopted by IBIS (I/O Buffer Information Specification). The signal integrity (SI) analysis within CR-5000 Lightning is performed by time-domain simulation that works in conjunction with design capture and physical layout. The frequency domain S-Parameter models are first transformed into compatible macro-models then imported into the simulation library. The transformation is only done once and the resulting model can be used for SI verification without the need for any detailed knowledge of the original S-Parameter set. The transformation tool provided by IdemWorks generates Zuken-specific, robust time domain macro-models quickly, taking care of sophisticated requirements such as model passivity and causality. It also provides port reduction to ensure fast and easy to use models that focus on real designer needs. Zuken and IdemWorks s.r.l., Italy,

DfM Subscription

The Valor design for manufacturing (DfM) software is available on a subscription basis. The software targets shorter time-to-market and to reduced new product introduction (NPI) costs. Users experience 57% fewer design revision spins than other companies. The subscription plan allows users to pay a monthly rate that includes all technical support and enhancements to the software at no additional charge for the duration of the subscription. The subscriptions are available in one, two, or three year terms. The software is used to analyze PCB designs for fabrication and netlist issues that cause scrap and revision spins. Assembly analysis is performed using the 35-million component Valor Parts Library for an added fee. Valor Computerized Systems Inc.,

Updated Design Software for Signal Integrity and Timing

EMA TimingDesigner 9.2 interfaces with the Cadence Allegro PCB Signal Integrity (SI) technology, providing a complete SI and timing design environment. The TimingDesigner integration with Allegro PCB SI allows full signal integrity and timing analysis early in the design phase, with timing reporting technology to quickly and accurately manage timing paths. The design tool brings static timing analysis technology into the Cadence signal integrity design flow, while creating an automated, reusable design process. It meets needs of high-speed designs, short timing margins, and tight project schedules. TimingDesigner has a graphical interface for developing and performing analysis on complex timing relationships, also enabling review of the entire signal path. Timing can be analyzed across traditional design domains (chip, package, board) allowing timing optimization at the system level. For ASIC and FPGA designers, this version includes enhanced support for SDC generation, 65-nm and below support for Altera FPGAs, and a new interface to the Actel Libero development environment. EMA Design Automation Inc.,



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