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Unified EDA Flow for Analog Designs and PCB Implementation
December 31, 1969 |Estimated reading time: 6 minutes
Nikhil Gupta and Taranjit Kukal, Cadence Design Systems Inc.
In analog design, designing for simulation and for PCB implementation are two parallel flows. In a unified solution, the design capture environment facilitates simulation and PCB implementation with the same design. The article covers various elements of the PCB EDA flow that can help solve the problem of low yield and reliability.
Designers use analog simulations iteratively to verify the functionality of designs before these are implemented on PCBs. While the intent is to produce PCBs that meet design specifications, yield and reliability are not always high. One reason for this mismatch is the disjointed EDA flows typically followed for simulation and PCB implementation. Using a single schematic-entry-driven simulation and PCB implementation flow can resolve the mismatch between design specs and manufacturability.
In analog design, designing for simulation and for PCB implementation are two parallel flows. The designer usually captures a design with simulation libraries and then simulates the design to verify functionality. For PCB implementation, the design is recaptured with another set of library parts that represent manufacturable components. This approach has some obvious pitfalls. Design capture has to be done twice: once for simulation and once for PCB implementation. This means that any changes required in the design need to be made in two places. Further, two sets of libraries must be maintained, which clearly is an unnecessary resource overhead. A more critical pitfall of keeping the two flows disparate is that a functionally correct design might not perform in a desired manner when implemented on a PCB with real components, which have tolerance variations. Layout parasitic effects might impact the results further – leading to a low yield. The solution therefore is to implement a unified flow that allows the same design to be simulated as well as manufactured.
Simulation-driven Layout
The backbone of the unified solution is a design capture environment that facilitates both simulation and PCB implementation with the same design. The designer should be able to work with several designs in a PCB project, simulate each design independently, and cross-probe from the schematic to the simulation engine and the PCB and from the PCB to the simulation engine. Cross-probing makes it easy to use the tools in the flow and to traverse and debug the design.
The design capture tool must have the capability to link each part to various versions of vendor models. The designer then can experiment with variations easily and chose the optimal parameters. The tool must provide the ability to link a design instance to a simulation model through simple model assignment. In many cases, the designer might simulate the design and optimize the values of components based on simulation results. The theoretical values obtained in this process need to finally map to the closest real parts that can be manufactured. For example, if simulations recommend a value of 1.05 kΩ for a resistor, the part needs to be mapped automatically to a 1.1-kΩ resistor for purposes of manufacturability. This mapping of theoretical values to real values should be done through the design capture tool in the unified solution. In addition, the flow should be capable of handling variants of the design in simulation flow along with PCB layout flow. This helps if the design is complex and has replicated design blocks that differ in component values.
Using a unified flow, the designer can add PCB layout constraints at the schematic-entry level based on simulation data. SPICE simulations produce node voltage and branch current data that can be processed easily to obtain PCB layout constraints. Branch currents can be used to determine trace thicknesses and voltage difference between nets can help determine track spacing. Power dissipation obtained from simulation can be processed to derive the temperature rise of a component, therefore deciding the need for heatsinks.
Integrated Simulation Toolset
In traditional design, simulation is performed without taking into consideration PCB manufacturing issues – such as tolerance variations – or operating conditions – such as device stress. Usual designer tendency is to over-design projects by tightening tolerances arbitrarily or adding heatsinks without analyzing their requirements. Even when simulation includes yield analysis with point tools, the results do not guarantee a high yield. The reason? A piecemeal approach.
To overcome the limitations of traditional simulation, the unified solution must integrate a variety of simulation capabilities, such as sensitivity analysis, optimizer, parametric plotter, yield analysis, and smoke analysis. The designer should have the flexibility to run the tools in any flow that is suitable for applying a simulation strategy, simulate the design for multiple simulation profiles, and examine the results of multiple simulations through a unified interface. Such a simulation environment will enable the designer to effectively use both simulation data and manufacturing part data to compute yield and stress and make better decisions related to devices and heat sinks. The results? Higher yield and reliability.
Common Libraries
Having common libraries for simulation as well as PCB design is a prerequisite for a successful unified flow. The common library paradigm implies mapping of manufacturable parts to simulation data. Each part in the library needs to contain entire information sets related to graphics, pin numbers, and PCB footprints for the implementation flow. It also must host the mapping-to-simulation models, including tolerances of parameters and maximum operating conditions that the device can handle.
Part Management
An optimal methodology for creation, management, and update of parts that supports a common design flow is a must for the solution proposed in this article. This part-management methodology must address the limitations of the design approach typically followed for magnetic parts. Traditionally, these parts are not used as off-the-shelf components from the library; they are laid out as part of the circuit design process. It takes long hours of manual calculations to design transformers and coils from electrical specifications. The design process further requires the designer to build a detailed datasheet for winding and ferrite core details. Building a simulation model that is consistent with the datasheet is another challenge. Further, the task of generating corresponding symbols and footprints for use in design capture and PCB layout adds to the designer’s effort.
Figure 1. Library data feeds simulation and PCB implementation flows.
A magnetic-parts-editing environment that reads electrical specifications and automatically creates symbols, simulation models, winding or bobbin details, and footprints for magnetics increases productivity. Since the unified flow relies on information such as tolerances and operating conditions, the part management process should support adding real datasheet information for discretes’ stress, tolerances, and operating conditions.
The capability to quickly create parts from models based on template graphics also is required, as is the capability to associate a model to an existing part. This is more important for analog designs, where symbol graphics play a significant role in illustrating the functionality of the part.
Comprehensive BOM
In the unified solution, the bill of material (BOM) must include components and assemblies that are obtained from simulation flows and are associated with the PCB implementation flow. As discussed above, the magnetic-parts creation process generates complete transformer assembly details besides the simulation model. The data includes details of wires, bobbins, ferrite, and other material and needs to be part of the BOM. The heatsinks identified in stress analysis also have to be part of the BOM.
Conclusion
It is important to have an EDA environment that allows analog simulation and PCB implementation from the same design. Such an environment leads to increased productivity by eliminating rework and reducing the chances of errors. Further, it increases the yield as well as reliability of the PCB. An integration framework that supports such a design methodology should be able to handle libraries that enable simulation, analysis, and implementation. It should provide a simple way of debugging the designs as well.
Nikhil Gupta is engineering director, R&D, in PCB design entry tools. Taranjit Kukal is architect, product engineering, in RFSiP and PSPICE solutions. Contact them at Cadence Design Systems Inc., 2655 Seely Avenue, San Jose, Calif. 95134.