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SAN JOSE, Calif. William Bottoms, Ph.D., will keynote the MicroElectronics Packaging and Test Engineering Council (MEPTEC) symposium "IC Packaging and Test Roadmaps: Device Trends Impact on Packaging and Test Technology and Supply Chain," on November 16, 2006, in San Jose, Calif. Bottoms' keynote will accompany four focus sessions on aspects of supply chains and roadmaps.
Bottoms argues that the transistor is no longer the limiting factor in cost or performance of an electronic product. Moore's Law, according to Bottoms, will reach its terminal limit soon, and assembly and packaging innovations will drive the industry. Consumer dominated, the industry will require packaging to progress moreso than ICs, and roadmaps must reflect this shift. Bottoms will comment on these theories, and other insights, during his keynote.
The symposium program encompasses packaging challenges, such as thermal efficiency and dominant styles; converging and diverging roadmaps, including innovation and rapid changes in the industry; test challenges, notably the migration of capabilities to test multiple technologies on one platform; and supply-chain trends and roadmaps, with panelists expressing opinions and behind-the-scenes decision processes, as well as answering questions on supply-chain management and services.
Chairman and CEO at NanoNexus, Inc., Bottoms has been involved in the electronics industry for 30 years. He chairs the technology working group for assembly and packaging of the International Technology Roadmaps for Semiconductors (ITRS), and has been part of numerous government committees setting technology roadmaps.
To learn more about the symposium visit our Events Page.