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PCB Systems Design Suite Targets Global Manufacturing
October 27, 2005 |Estimated reading time: 1 minute
WILSONVILLE, Ore. — The globalization of the electronics market is creating several enterprise design challenges, most often faced by large corporations spread across multiple sites. Mentor Graphics Corp. introduced its Expedition Enterprise flow for PCB systems design, enabling large companies to leverage multi-disciplined design team resources while providing global access to intellectual property (IP). The solution also gives companies the ability to integrate design data with corporate PLM, as well as supply chain and manufacturing systems.
Building on the flow of critical plug-ins to improve designer productivity and support advanced technologies, Expedition Enterprise features supply-chain integration and design team management across multiple sites — enabling data transfer among design teams and easing communications with the corporate enterprise. The flow combines Mentor's DxDesigner for design definition, CES for constraint editing, Expedition PCB for layout and DMS for data management. ICS Pro Explorer, which evaluates and verifies constraints defined early in the process, also is included.
Expedition Enterprise integrates FPGA and PCB design flows, allowing current design that uses the I/O flexibility of FPGAs, deals with routing and timing challenges and eases design constraint management. The solution is available on multiple hardware platforms.
Mentor's solution features library creation, which develops all library elements in a single design environment; design data management, which manages library and design data to ensure access to and integration with corporate product life-cycle management systems; and a constraint editor system that provides a common rule definition and verification environment for physical and electrical constraints that may occur from design capture through layout (Figure 1). Other features include:
Design definition — Uses hierarchy to capture large design rapidly, reuse proven circuits and attributes and manage variant designs.
Functional verification — Simulates analog, digital and mixed-signal circuits within and integrated environment.
PCB/FPGA co-design — Designs FPGA/PCB systems concurrently.
Signal-integrity verification — Uses a multi-lingual device and interconnect-modeling environment to verify synchronous and asynchronous signal integrity.
Design layout — Uses Auto-Active correct-by-construction to place and route complex PCBs in a single-design environment.
Manufacturing preparation — Creates and validates board panels, copper balancing and product documentation within a common-layout editor.
Process customization — Uses industry-standard language to automate and extend the design environment.