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SMTA Announces Call for Papers for IWLPC 2005
January 26, 2005 |Estimated reading time: Less than a minute
MINNEAPOLIS, Minn. — The SMTA announces plans for the Second Annual International Wafer-Level Packaging Congress and Exhibition (IWLPC), to be held November 3-4, 2005, in San Jose, Calif. The IWLPC will track IC packaging and test technologies, with special emphasis on 3-D stacked packaging. The dual-track program will address package design concerns, package assembly, fabrication technologies, board design for chip scale packages and test/reliability.
The conference will cover topics within two tracks on wafer-level Packaging (WLP) and 3-D stacked packaging/chip scale packaging. The complete call for papers can be found on the IWLPC event Website on www.smta.org/iwlpc/call_for_papers.cfm.
Abstracts of 200 words should be submitted directly online, or sent by e-mail no later than April 1, 2005, to SMTA director of education, KristinNafstad, at kristin@smta.org.
The congress co-chairs are Dr. Ken Gilleo of ET-Trends LLC and Dr. Luu Nguyen of National Semiconductor. The event includes a two-day technical program and two days of exhibits, showcasing suppliers to the semiconductor packaging and testing industry.