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10th Pan Pacific Symposium & Exhibit Program Announced
November 11, 2004 |Estimated reading time: 1 minute
Minneapolis, Minn.—The 10th Annual Pan Pacific Microelectronics Symposium & Exhibit, to be held January 25-27, 2005 at the Sheraton Kauai Resort in Kauai, Hawaii, promotes international technical interchange and provides a premier forum for extensive networking among industry professionals and business leaders throughout the Pacific Basin.
Beginning on Tuesday, the technical program will consist of sessions on 3D Chip Stacking, System-in-Package (SiP), RF & Sensor Technologies, High Performance Packaging, and Assembly Management Strategies, and the Keynote Presentation, Green Electronics in China, by Kei Biu of SMT Corporation.
Continuing on Wednesday, the technical program will feature sessions on Lead-free Reliability, Solder & Rework Processes, Lead-free Microstructures and Performance, Lead-free Implementation, Package Solder Joint Reliability, and Electronic Adhesives.
Concluding on Thursday, the technical program will have sessions on Chip Attach and Materials Technologies, Cleaning & Surface Treatments, Packaging & Assembly Trends, and Inspection and Test.
Lunch and coffee breaks throughout, as well as the Welcome Reception on Tuesday and Exhibitor Reception on Wednesday, will be spent with exhibitors.
Each year the Exhibition & Symposium averages more than 100 participants from a total of 15 different countries throughout Europe, the Americas, and the Pacific Basin. This year, sponsors include IMAPS (Korea, Singapore and Taiwan), ITRI (Taiwan), Japan Institute of Electronics Packaging and Semiconductor Equipment & Materials International (Japan, Korea, Singapore, Taiwan and U.S.A.), SMT China, and Surface Mount Circuit Board Assembly (Australia).
For full details on the SMTA Pan Pacific Microelectronics Symposium & Exhibit, visit the event Website at http://www.smta.org/pan_pac, or contact SMTA administrator JoAnn Stromberg at (952) 920-7682 or joann@smta.org.