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PCB Fabrication: Achieving solderable finishes
December 31, 1969 |Estimated reading time: 9 minutes
Today's ultra-fine-pitch components create a challenge for manufacturers not only to meet board surface planarity requirements using conventional processes, but also to deliver more reliable products faster and cheaper.
By George Trinite
How can a printed circuit board (PCB) fabricator consistently produce the board surface planarity quality required for depositing an accurate, consistent volume of solder paste on the tightly spaced pads of today's designs? The proper choice of materials is essential. Considerations include the physical and electrical properties of the board, its dimensional stability, impedance characteristics, Z-axis expansion, and uniformity and surface condition. In fact, uniformity and surface condition of the selected material can affect the finished surface planarity.
With multilayers comprising the majority of ultra-fine-pitch boards, raw laminate selection should not influence surface planarity. However, ultra-fine-pitch products, which normally are characterized by very dense circuitry, require laminates to have smooth surfaces often referred to as "surface-enhanced" material. Such laminates feature resin-rich prepregs used against the traditional 0.0007" copper foil. Therefore, for the PCB fabricator, the finished board's smooth surface is accomplished in the same manner as that produced by the laminate manufacturer's surface-enhanced material by applying a ply of resin-rich prepreg next to the copper foil used for the outer layers. The use of ultra-thin copper foil (0.00035") when lines and spaces are under 0.004" will improve yields.
Imaging Ultra-fine Pitch
Successfully imaging fine-pitch (less than 0.020") quad flat pack (QFP) footprints is not an issue with today's technology. Rather, it is the signal lines and spaces (0.004 to 0.005") associated with fine-pitch components that create an imaging challenge for PCB fabricators. New technologies such as direct laser imaging and projection imaging may comprise the future of fine-line reproduction. However, most PCB manufacturers now are using traditional ultraviolet (UV) contact printing with a hinged glass frame for improving front-to-back registration of the phototools, resulting in off-contact printing. This technique still can produce lines and spaces down to 0.003". However, using some or all of the following printing techniques will improve fine-line imaging yields:
- Highly collimated light in the exposure unit
- Higher intensity exposure sources
- Good control of developer chemistry, preferably with a feed-and-bleed system
- Removing the cover sheet from the dry film before exposure
- Applying a thinner (0.001") photoresist.
Etching
As with ultra-fine-pitch imaging, the challenge to the PCB manufacturer is the fine lines and spaces of the conductors rather than the QFPs. Fine-line etching depends on equipment condition and the thickness of the copper to be etched. Higher yields can be realized by starting with ultra-thin copper foil. But before etching fine-line product, the equipment must be profiled. This can be done by developing a small test pattern with 0.002 to 0.003" lines and spaces that is stepped and repeated evenly across a standard panel size. Using this test image, a panel is processed through the etcher by taking measurements of the lines from the panel's top side, then comparing them to the same location from the bottom side. Conductor widths of the leading edge to the trailing edge of the panel, as well as from the right to the left side, also must be compared. If the resulting data vary greater than 0.0005" in the conductor width, the etcher must be fine-tuned. Because many different etchers exist, fine-tuning varies. Modifications that may improve etching uniformity across the panel and from top to bottom include:
Figure 1. Poor stencil gasketing permits solder paste to smear between the pads.
- Adding nozzle extenders to the manifolds. This will locate the nozzles much closer to the panel's surface as it passes through the etch chamber.
- Varying the length of the extenders by placing the center nozzles closest to the panel, and by gradually reducing the length until the shortest is toward the outside chamber edge.
- Reducing the nozzle count in the top and bottom manifolds to effect higher pressures.
- Adding valves to the inlet ends of the manifold spray tubing to permit solution pressure control.
Additional modifications may be necessary to achieve the desired uniformity.
Soldermask
The preferred soldermask for the majority of PCBs is a liquid photoimageable (LPI) material. In designing soldermasks for ultra-fine-pitch QFPs, two approaches have been taken:
Figure 2. Good stencil gasketing (pads set higher than soldermask surface) results in accurate solder paste deposit blocks.
- An open block, sometimes referred to as a "gang clearance," covers one horizontal or vertical row of pads. This design requires no soldermask between the pads while yielding a standard manufacturing tolerance when registering the artwork to the panel.
- Another design requires soldermask between the pads and is often referred to as a "web" or "dam." Using standard equipment, webs can be successfully produced down to 0.003" wide but require excellent process control for soldermask development. Any excessive undercutting will cause the very narrow webs to peel off the board. Thus, using the standard practice of increasing soldermask clearance by 0.002" per side (and the minimum web thickness of 0.003"), the spacing between the pads must be a minimum of 0.007". However, excellent results can be achieved using boards without webs; only soldermask artwork with block clearances is sufficient.
Stencil Gasketing
An occasionally unnoticed PCB feature that is critical to achieving good stencil gasketing is soldermask thickness related to finished pad height. To verify this, many test boards were made starting with 0.5 oz copper using a print-and-etch process (no copper plating), which resulted in pads heights of only 0.0007" above the laminate. Standard 0.0008 to 0.001" thick LPI soldermask was then applied. When printed using a 0.004" stencil, the boards reflected very poor results. Approximately 50 percent of the pads exhibited shortings. The reason: poor gasketing, i.e., the stencil joined the PCB at the highest point (on top of the soldermask), permitting the solder paste to smear between the pads (Figure 1).
A second lot of boards was produced with plated copper over the 0.5 oz copper foil, resulting in a height of 0.002 to 0.0024". Once again, standard LPI was applied, and the boards were printed with the same 0.004" stencil. No defects were detected. It was concluded that with the pads set higher than the soldermask surface, the stencil is permitted to "gasket" to the pads themselves. The result was a very accurate, three-dimensional block of solder paste deposited on the pads (Figure 2).
Other areas that can result in poor gasketing include:
- Plugging via holes from the component side of one-sided boards.
- Poorly plugged via holes that leave a crown of soldermask over the top of the via hole, which can be up to 0.004" higher than the pads.
- Legend ink that may be outlining QFPs.
Surface Finish Technologies
A PCB's solderable finish can affect stencil printing and component placement. In an experiment to determine how PCB surface finish affects the stencil printing process, the three most popular board surface finishes were selected: hot-air solder leveling (HASL), organic solderability preservatives (OSP) and immersion nickel/gold (Ni/Au). Using the same printer and print parameters, the experiments proceeded with the identical solder paste and stencil for each board. Although solder paste volume vs. area was measured 30 times for each board, this experiment showed no significant variations between the board types. However, the variation appeared slightly larger on the HASL finish. Therefore, solder leveling can affect solder paste printing and result in solder scoops and skips from the pad dome. Minor placement problems also can be attributed to an uneven finish on pad surfaces.
HASL has been the preferred surface finish method for most through-hole and some surface mount boards. Panels to be processed with a HASL finish must first complete a pretreating that consists of cleaning, a preheat cycle and fluxing.
Vertical HASL equipment. When using this equipment, the panel is vertically dipped into a deep pot of molten solder that is "squeezed" off using hot-air knives as it exits from the tank. A disadvantage is the inability of QFPs to exit the air knives at an angle. The pads that run lengthwise against the air knives typically are too thin, creating intermetallic solderability problems, while those parallel to the air knives typically have excess solder thicknesses that may cause shorts. Dwell time is another problem with vertical equipment the panel bottom may be immersed in the molten solder for four to five seconds longer than the nominal dwell time, which can accelerate copper migration contaminating the solder.
Horizontal HASL equipment requires the same pretreatment as its vertical cousin. The horizontal equipment is a conveyorized system that takes the panels through a recirculated solder pot before passing through hot-air knives. The panels can be placed on the conveyor at a 45° angle, enabling QFPs to pass through with an even distribution across the pads. However, while the width of the conveyer may limit the angle at which some of the larger formatted panels can be processed, the dwell time is much shorter than the vertical process, minimizing solder contamination. The horizontal HASL equipment is recommended for both 100 percent SMT boards and mixed technology. This equipment, along with a good preventive maintenance program, will produce a solder thickness of 0.0001 to 0.0008" as measured on QFPs.
OSPs are used as temporary coatings to protect copper from oxidizing. The OSPs provide a solution to the need for a uniform planarity on PCB pads and eliminate bridging in fine-pitch applications. Benzimidazole OSPs may be used in aqueous clean and no-clean processes and do not produce hazardous waste. Tests have indicated that OSP-coated boards remain solderable for more than a year.
The OSPs are applied to the bare board as the final step in the manufacturing process. They can be applied in dip tanks, but a horizontal conveyorized flood immersion process is preferred. The latter provides tighter process controls and greater coating uniformity and thickness, and can produce a uniform coating of 0.00003 to 0.00004".
Finally, the OSP finish is a less costly process than the Ni/Au method while providing a very planar surface. On the down side, concern areas include whether finishes can withstand multiple thermal cycles, if no-clean fluxes are truly compatible, and whether wettability and shelf life are acceptable. A more robust process for the OSP surface finish has been reported when a nitrogen atmosphere in the wave/reflow operation is used.
Immersion Ni/Au. Gold is an excellent solderable surface, and nickel acts as a strong barrier between plated copper and gold to prevent oxidation and extend shelf life.
The immersion process only plates areas exposed after soldermask is applied, minimizing the cost associated with gold plating. This process is done with electroless nickel plating of 0.000015 to 0.00002", followed by immersion gold of 0.000003 to 0.000005".
One concern with soldering on gold is that the process weakens the solder joints. Another is the cost of gold. However, close attention to panel preparation during PCB manufacturing can hold this cost to a minimum. Cost-effective panel preparation consists of covering all panel areas that do not require a solderable surface. Before gold plating, the soldermask artwork should be modified to ensure that all copper borders are completely covered, so the gold is plated on the required PCB areas only.
Conclusion
Today's successful PCB manufacturer of ultra-fine-pitch technologies must not only have a thorough understanding of customer requirements, but also the ability to offer alternatives that will result in higher first-pass assembly yields. With such component placements come coplanarity problems. Thus, the manufacturer must offer the customer an alternative to the standard HASL finish. Both the Ni/Au and OSP methods will result in very planar surfaces for component placement.
GEORGE TRINITE may be contacted at Sanmina Corp., 18522 Von Karman Ave., Irvine, CA 92612; (949) 833-0870, ext. 3113; Fax: (949) 623-2892; E-mail: george.trinite@sanmina.com.
This article is adapted from a presentation originally given at APEX 2000.
WORKS CONSULTED
For a list of works consulted, contact the author.