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Flux and Cleaning
December 31, 1969 |Estimated reading time: 4 minutes
Ray P. Prasad
The selection of flux and cleaning processes plays a critical role in the manufacturing yield and product reliability of electronic assemblies. The subjects of flux and cleaning are interrelated - one cannot be discussed without the other. The function of flux is to remove oxides and other nonmetallic impurities from the soldering surface and prepare a clean surface for joining. After soldering, cleaning may be required to remove flux residues.
The type of flux residues or contaminants that require cleaning are determined primarily by the type of flux used, but halides, oxides and other contaminants are introduced during storage and handling, as well. The use of aggressive fluxes makes soldering easier even if components and boards are slightly oxidized and contaminated. However, most flux residues must be removed by cleaning. The cleaning process is selected on the basis of flux type, contaminants type and assembly type - that is, mixed assembly (Type II and III SMT) containing both through-hole and surface mount components or full surface mount (Type I SMT). For example, mixed assemblies may need one cleaning process after reflow soldering and another after wave soldering.
The selected cleaning process may use solvents or deionized (DI) water, or a combination of the two. In the past, the commonly used solvents were chlorofluorocarbons (CFC) such as Freon. However, as a result of 1987`s Montreal Protocol, the use of CFCs was banned at the end of 1995. CFCs have been determined to cause ozone layer depletion - an environmental hazard. Since the passage of the Montreal Protocol, various alternative solvents have been developed to replace CFCs. The industry has had no choice but to use either an alternative solvent or water-soluble fluxes and pastes for cleaning or to move on to a "no-clean" process by using low-residue or no-clean fluxes and pastes.
Current technology using no-clean or low-residue fluxes is eliminating the need for cleaning. However, the use of no-clean flux requires a clean work environment and a culture change that not only affects the users, but their suppliers as well. In addition, the use of no-clean fluxes may require a controlled soldering atmosphere to provide a process window compatible with their lower activity.
The main concern in cleaning either through-hole or surface mount assemblies is adequate removal of flux to prevent corrosion problems in the field. The job is difficult for surface mount assemblies because flux may be trapped in the tight spaces between surface mount components and the substrate. Also, as a result of higher temperatures and relatively longer times during reflow soldering, the fluxes, especially rosin fluxes, become more tenacious and are more difficult to clean.
Components with finer pitches have lower standoff heights and a "picket fence" is created around the package that makes cleaning difficult. In addition, the EIAJ fine- pitch packages have essentially no standoff height. They sit practically flush with the board. Fortunately, though, ball grid arrays (BGA) are increasingly replacing high-pin-count fine-pitch devices. BGAs are easier to clean because of their higher standoff. Plastic BGAs (PBGA) have a standoff height of 0.018 to 0.022" and ceramic BGAs (CBGAs) have a standoff height of about 0.035". The 0.030" PBGA eutectic solder balls collapse after reflow to 0.018 to 0.022" standoff. The high-temperature 0.035" CBGA balls do not melt during reflow. MicroBGAs have a low standoff height of only 0.0035". It will be difficult to remove flux from underneath microBGAs.
Whereas typical leaded components, such as dual in-line packages (DIP), are spaced 0.030 and 0.050" off the substrates, surface mount components are spaced much closer. Small passive components, such as ceramic resistors and capacitors, and large active components, such as leadless ceramic chip carriers (LCCC), may be spaced only 0.001 to 0.005" off the substrate. Other active surface mount components, such as small-outline integrated circuits (SOIC) and plastic leaded chip carriers (PLCC), are usually spaced from 0.01 to 0.025" off the board. Not all through-hole mount devices have higher standoff heights than surface mount components. For example, 14-lead DIPs have lower standoff heights than many surface mount components.
When chip resistors and capacitors are attached with adhesive, the adhesive itself will fill most of the space between the chips and the board, leaving little room for flux entrapment between the adhesive perimeter and the pad metallization. However, rapid curing of the adhesive may result in voids in the adhesive and will absorb flux that is almost impossible to remove. When no adhesive is used, as with LCCCs, SOICs and PLCCs, flux and other residues are expected to end up under these components. The problem is especially acute if the gap is tight and the components are large: Components the size of LCCCs not only have small standoff heights, they also have a large area underneath, which increases the potential for flux entrapment and makes it difficult for solvents to penetrate beneath them to remove the flux. Thus, area and standoff heights should be considered together to ascertain the potential cleaning difficulty.
Next month`s column will review the function of flux and general considerations in flux selection.
This column was adapted from Chapter 13 of Ray Prasad`s 1997 textbook, Surface Mount Technology: Principles and Practice.
RAY P. PRASAD is an SMT Editorial Advisory Board member and author of the text book Surface Mount Technology: Principles and Practice. He is also founder of the Ray Prasad Consultancy Group which specializes in helping companies establish strong internal SMT infrastructure. Contact him at P.O. Box 219179, Portland, OR 97225; (503) 297-5898; Fax: (503) 297-0330; Web site: www.rayprasad.com.