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Assembly and Rework of Lead-Free PoP Technology
August 8, 2012 |Estimated reading time: 14 minutes
Editor's Note: This article originally appeared in the July 2012 issue of SMT Magazine.
Abstract
Miniaturization continues to be a driving force in both integrated circuit packaging and PCB laminate technology. In addition to decreasing component pitch (lead-to-lead spacing), utilization of the vertical space by stacking packages has found wide acceptance by both designers and manufactures of electronics alike. Lead-free package-on-package (PoP) technology represents one of the latest advancements in vertical electronics packaging integration and has become the preferred technology for mobile handheld electronics applications. TT electronics in Perry, Ohio, has developed the capability to assemble and rework numerous state-of-the-art packaging technologies. This article will focus on the essential engineering development activities performed to demonstrate TT electronics’ ability to both assemble and rework PoP components.
Background
For many years peripherally-leaded packages were at the forefront of electronic packaging technology. In those days the main purpose of integrated circuit (IC) packaging was to protect the device inside from environmentally induced corrosion, provide mechanical protection, and provide an electrical path to the printed circuit board. This strategy proved effective until ever-increasing lead counts made the peripherally-leaded package impractical. The introduction of area array packaging technology solved this problem. In today’s area array packaging, the leads are distributed across the entire surface of the package in a rectangular array fashion (Figure 1). Thus, a larger I/O count can be accommodated in a smaller area package. In fact, the area required for a peripherally leaded package increases exponentially with lead count while the area array package shows a linear dependence (Figure 2).
In recent years the stacked packaging structure has found acceptance in the mobile handheld electronic market. By combining logic and memory chips into the same stacked package, designers can fit more function into a smaller and lighter form. The two predominant forms of stacked packaging structures are: the stacked die stricture and the PoP structure (Figure 3)1.
Figure 1: Illustrates the difference between QFP and BGA packages, showing an ultra-fine-pitch 160 lead QFP (pitch 0.3 mm) on a background consisting of the bottom side of a 1.5 mm pitch PBGA with 225 interconnection solder balls. From this picture it is easy to understand the popularity this BGA package has received among the people in the assembly business. Note that there are five QFP leads for every BGA solder sphere.
Figure 2: Peripherally leaded packages consume area at an exponential rate when compared to area array packages and the same pin count and lead pitch (0.5 mm pitch shown).
The most obvious benefit of both PoP and the stacked-die structure is space savings; however, some other key differences make the PoP package the preferred embodiment. The main benefit of PoP structure is that the memory is decoupled from the logic device. Therefore:
- The memory package can be tested separately from the logic package.
- Only known good packages are used in the final assembly. Compare this to the stacked-die package where the entire package is thrown away if either the memory or logic is defective.
- The end user controls the logistics. This means that the memory can treated as a commodity item and sourced from multiple suppliers.
- Any mechanically mating top package can be used. Therefore, for a low-end phone, a smaller memory package can be used on the top package. For a high-end phone, more memory could be used with the same package.
- Because memory only comes into play during final assembly, there is no need for logic suppliers to source memory.
Electrically, PoP offers benefits by minimizing track length between logic components and memory. This results in better performance of the devices since the shorter routing of interconnections between circuits results in faster signal propagation and reduction in “cross- talk” noise.
Figure 3: The stacked-die structure (left) versus the PoP structure (right).
TT electronics has invested significant financial as well as engineering resources into the development of best-in-class assembly capability, thus, aligning our assembly platform with the latest integrated circuit packaging technologies as well as those to come in the foreseeable future (Figure 4). PoP technology represents one of the latest in trends in IC packaging. The use of PoP packaging technologies increases assembly complexity. To offset this added complexity, PCB assemblers must employ improved techniques of assembly and rework.
Figure 4: Trends in Integrated Circuit packaging 2009 courtesy of The Advanced Semiconductor Engineering Group of Japan.
Test Vehicle and Components
The test vehicle used for this evaluation was a commercially available board with space for 15 PoP placements (Figure 5). The board size was 132 mm x 77 mm and 1.0 mm thick. Two different surface finishes were selected for this evaluation. Two different PCB surface finishes were investigated: ENIG (electroless nickel immersion gold) and OSP (organic solder preservative) 2, 3.
Figure 5: PoP test vehicle.
The pads on the test vehicles and the components are daisy chained together. There are a total of three networks for each populated location (Figure 6); one network for the entire bottom, one network for three leads located at each corner of the top package, and one network for the remainder of the leads on the top package.
Figure 6: Electrical diagram of the three daisy chained network on each of the 15 sites of the test vehicle.
The PoP components selected for our initial experiments were 14 mm x 14 mm. The bottom package had a four-row peripheral array of solder balls with 353 I/O on a 0.50 mm pitch (Figure 7). The top package had a two-row peripheral arraywith 152 I/O on a 0.65 mm pitch (Figure 8). The solder ball alloy for the top package and bottom package were SAC105(Sn98.5/Ag1.0/Cu0.5) and SAC125 (Sn98.3/Ag1.2/Cu0.5) respectively.
Figure 7: Bottom module.
Figure 8: Bottom module.
PoP Assembly Considerations
The main goal of the PCB assembly test matrix was to determine the impact of several key assembly variables on final assembly yield. An extensive literature search as well as discussions with the manufactures of PoP components and assembly material suppliers led to the following PCB assembly matrix (Table 1):
- Evaluation of the impact of two PCB surface finish options ENIG versus OSP on final assembly yield.
- Evaluation of two fluxing options (mesh V paste versus tack flux) for the top PoP package and their effect on final assembly yield.
- Development of a cost-effective method for transfer fluxing of the top PoP module.
- Development of a rework process for underfilled PoP components.
Test Vehicle Assembly
All test vehicles were assembled on a conventional surface mount technology (SMT) line. The test vehicle PCBs were all screened with a no-clean SAC 305 type III solder paste using a 5 mil thick stencil (Figure 9). The bottom packages were then placed directly on the test vehicle. The top packages were then dipped in either a flux or dippable solder paste prior to being placed on the lower package. A special fixture was developed for transfer fluxing of the top PoP package. An evaluation was conducted to determine the optimal method for transfer fluxing of the top PoP component (a transfer flux versus a “newly” developed ROLO SAC 305 transfer paste).
Once all PoP packages had been placed, the entire assembly was reflowed in a convection oven in an air environment. A reflow profile suitable for all ball metallurgies was used. The peak reflow temperature for the process ranged from 240°C to 245°C, with a time above 217°C ranging from 60 seconds to 70 seconds.
The underfill material was a reworkable epoxy based, heat cured material developed specifically for PoP applications. The underfill was a black opaque color and had a glass transition temperature (Tg) of 69°C. The coefficient of thermal expansion was 52 parts per million (ppm) below Tg and 188 ppm above Tg. The underfill was dispensed using a conventional adhesive dispenser and allowed to flow under the packages via capillary flow. Curing was accomplished using the recommended curing profile in air of 8 minutes at a temperature of 130°C.
Table 1: Test vehicle assembly matrix.
Figure 9: Solder paste print using a Type III SAC305 solder paste.
Forced Rework Process
Four cells of the test matrix were reworked. Two of the rework cells consisted of underfilled PoP packages. Rework was accomplished using a combination of infrared and hot air heating. Considerable effort was spent in developing a rework process for the underfilled components since the addition of underfill makes the rework process considerably more complex.
Transfer Fluxing Process
TT electronics engineers developed a semi-automated method for transfer fluxing the top module of the PoP package using a specially designed fluxing fixture (Figures 10a and 10b). This fixture was developed for low-volume, high-mix assembly processes. This fixture has 84 pockets machined to a depth equal to one-third the ball height of the top PoP module. Additionally, a locating mark was machined next to each pocket at a fixed distance. Using these locating marks, each location can be programmed into the placement machine for automated placement of the top module into the pocket. Care was taken to ensure that the outline of the TT Fluxing fixture was the same as a JEDEC matrix tray. In doing this, the tray can be utilized in the following manner:
- Transfer flux (or paste) is screened into the pockets.
- The fixture is then inserted into the placement machine and the top module is inserted into the pre-fluxed pocket.
- After the top module has been placed into each of the 84 pre-fluxed pockets, the tray is placed into the matrix tray handler of the placement platform.
- The pick-and-place tool is then used to place the bottom PoP module prior to placement of the pre-fluxed top module.
Figure 10: The PoP Transfer fluxing fixture developed by engineers at TT electronics (left). Regular JEDEC outline matrix tray for 14mm PoP bottom and top modules (right).
The TT PoP Fluxing fixture provided successful soldering results on numerous trial runs (Figures 11a and 11b). A survey ofrecent publications on PoP assembly revealed that the preferred method of assembly is to use a paste type transfer flux for thetop module. It was determined that more consistent soldering results were obtained using the mesh V transfer paste for theassembly of the top PoP module therefore this material has been adopted as the process of record4.
Figure 11a: Transfer paste (Type IV) ROLO, no-clean.
Figure 11b: Transfer flux, no-clean.
Rework of Underfilled PoP Packages
Reworking underfilled PoP packages represents a significant challenge for development of an effective rework process. To clarify the effect of temperature on the underfill shear strength it was determined that the shear strength of the underfill as a function of temperature needed to be quantified. It was determined that the shear strength of the laminate could best be measured using test coupons consisting of underfill sandwiched between two pieces of laminate. The test coupons were prepared using 1” square pieces of laminate with a thickness of 0.100”. Thick pieces of laminate were used to ensure that no deformation of the sample occurred during shear testing. This allows for a more precise and consistent measurement of the underfill shear strength. To prepare the samples the following process was used.
- A controlled volume of underfill was then dispensed onto one of the laminate pieces. With the underfill acting as an adhesive and using temporary 0.005” shims to control the separation of the laminate pieces.
- Two laminates were then joined together and temporally secured using clamps. The clamps ensured that there was no movement of the laminate/underfill sandwich prior to curing.
- The samples were then cured for eight minutes as 130°C.
- Using this technique laminate/underfill/laminate sandwiches were produced with a consistent underfill bond line thickness of 0.005”. After curing, the test samples were then placed into fixture which measured the shear strength of each sample.
Using this technique laminate/underfill/laminate sandwiches were produced with a consistent underfill bond line thickness of 0.005”. After curing the test samples were then placed into fixture, which measured the shear strength of each sample.
Figure 12: The cohesive failure interface of the underfill on the shear strength test coupons.The fixture used to measure the underfill shear strength was then heated to temperatures of 230°C, 240°C and 250°Crespectively. A thermocouple was used to ensure the underfill shear test samples reached the desired temperature. The samples were then sheared to failure (Figure 12) and the maximum shear strength at cohesive failure of the underfill wasrecorded. To ensure accurate shear strength measurements the area of the underfill deposit at the failure interface wasmeasured and then used to determine the shear strength per unit area. (NOTE: all failures were cohesive in nature, no failureswere observed at the underfill laminate interface.) A total of 10 measurements were taken at each of the three temperatures. The 10 readings in milli-Newtons per square millimeter were recorded and the data has been plotted in Figure 13. The underfillshear strength shows a consistent decrease in shear strength as a function of increasing temperature.
Figure 13: Plot of underfill shear strength at various temperatures of interest for SAC 305 rework.
The essential elements of successful PoP package rework involve the following steps 6, 7, 8:
- Heating of the PoP structure and removal of the underfill fillets from the perimeter of the package using a plastic scraping tool (taking care so as not to damage the laminate).
- Heating of the PoP using an appropriate SAC305 profile.
- Removal of the top and bottom PoP packages.
- Removal of the residual underfill using flux as a solvent and heat (Figure 14).
- Re-dressing the site using SAC305 alloy and a soldering iron.
- Replacements of the top and bottom package followed by reflow using an appropriate profile.
- Reapplying underfill and finally cure.
Successful rework of the PoP components requires an automated rework tool with a transfer fluxing station, vacuum component handling system, split-optics for accurate placement and a real-time computer-controlled, closed-loop heating system using hot air and/or infrared heating (Figure 18).
Figure 14: PoP rework site after removal of underfilled component (left); site after complete underfill removal (center); site after complete underfill removal and site redress (right).
Underfilled Options for PoP Packages
Two options are available when underfilling PoP packages. One involves underfill of the bottom PoP module only and the secondinvolves underfilling both the top as well as the bottom PoP modules. A review of published literature reveals thatthe preferred method for optimal thermal cycle as well as drop test reliability involves applying underfilling of both top and bottom PoPmodules. Thus, it was determined that all underfilling for the test matrix would be performed on both the top and bottom PoP modules 9, 10.
Assembly Results
Assembly Yield & Cross Sections
Following assembly, all packages were inspected using transmissive X-ray, perimeter solder joints were inspected using an ERSA scope and all modules were electrically tested using a digital multimeter. No failures were observed after assembly. Figures 15 through 20 show several images of the PoP packages after assembly and forced rework. Additionally no failures were observed in forced rework locations.
Figure 15: 45X image of OSP-reworked site.
Figure 16: Transmission X-ray of ENiG forced reworked module.
Figure 17: ERSA image of ENIG finish with forced rework.
Figure 18: 3D X-ray image of PoP on PCB with ENIG finish.
Figure 19: Cross-section of underfilled module with forced rework on ENIG finish.
Figure 20: 3D X-ray of OSP forced reworked module.
Conclusions
Work to date has established successful primary attach processes for package-on-package assembly using transfer fluxing of dippable Type V solder paste. In addition the TT PoP Fluxing fixture has shown its viability in volume manufacturing. Both combinations of PCB surface finish (ENIG and OSP) demonstrated excellent process yields. A rework process for underfilled PoP packages was developed and effectively demonstrated in a manufacturing setting. By successfully executing the build matrix with no electrical failures, TT electronics has shown its capability to effectively assemble PoP packaging technology.
Acknowledgments
The authors would like to thank everyone that helped to make this a successful endeavor, especially David Molyneux, senior SMT production technician for his diligence in programming the Juki KE2060.
References:
1. J. Lau, “State of the art and Trends in 3D Integration,” Industrial Technology Research Institute, Taiwan, Chip Scale Review, March, 2010. 2. H. McCormick, I. Sterian, et al, “PoP: An EMS Perspective on Assembly Rework and Reliability,” Global SMT & Packaging, March, 2009. 3. H. McCormick, L. Smith, et al, “Assembly and Reliability Assessment of Fine Pitch TMV PoP Components,” Proceedings of APEX Conference, April, 2010. 4. A. Yoshida, J Taniguchi, et al, “A Study on Package Stacking Process for Package on Package (PoP),” Amkor Internal Publication, 2007. 5. V. Solberg, P. Damberg, “POP Assembly Process Fundamentals,” Printed Circuit Design & Fab/Circuits Assembly, December, 2009. 6. J. Sjoberg, D Geiger, et al, “Package on Package (PoP) Process Development and Reliability Evaluation,” Global SMT & Packaging, October, 2007. 7. J. Wildhart, Panasonic, M Dreiza, Amkor Technology, “Challenges for high density PoP (Package on Package) Utilizing SOP (solder on pad) Technology,” Global SMT & Packaging, April, 2008. 8. A. Syed, T. Kim, et al, “Effects of PB Free Alloy Composition on Drop/Impact Reliability of 0.4, 0.5 & 0.8 mm Pitch Chip Scale Packages with NiAu Pad Finish,” Amkor Technologies, IEEE Electronic Components and Technology Conference, March, 2007. 9. V. Wang, D. Maslyk, “Reliability of PoP Devices Manufactured Using Underfill Methods,” Henkel Loctite Corporation internal publication, 2007. 10. B. Perkins, “Design Considerations for Package on Package Underfill,” Asymtec internal publication, 2009.Ray Clark began his career in TT electronics in 2006 as a senior test technician. He became a Certified IPC Trainer for the IPC-A-610 and IPC J-STD-001 in 2007. In 2008, he was given the position of senior training specialist. He regularly conducts formal training classes for the IPC A-610 Workmanship Standards Certification, IPC J-STD-001 Training and Certification, Solder Rework/Repair, and provides hands-on solder training for beginners and advanced applications and Solder Certification and Recertifications. Prior to TT electronics, Clark served in the United States Navy for 17 years as an electronics technician, where he performed various types of repair and rework of military electronics.Joseph D. Poole is no longer with TT electronics.