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Minimizing Voiding in QFN Packages Using Solder Preforms
June 12, 2013 |Estimated reading time: Less than a minute
According to Prismark Partners, the use of quad-flat no-leads (QFNs) is growing faster than any package type except for flip-chip chip-scale packages (CSPs). Prismark projects that 32.6 billion QFNs will be assembled worldwide by 2013, which represents 15% of all integrated circuit (IC) packages.
However, QFNs can be a challenge to assemble, especially when it comes to voiding. In most QFN assembly processes, solder paste is used as a means of attachment. This approach can be problematic, as excessive voiding often occurs due to the lack of standoff on the component and the high flux content of the paste. The addition of a solder preform can reduce such voiding by increasing the solder volume of the joint without adding flux volume.
Adding preforms to an assembly process is very easy. Preforms are packaged in tape-and-reel for easy placement by standard pick-and-place machines, right next to your components. The focus of this paper will quantify the preform requirements and process adjustments needed to use preforms in a standard SMT process. In addition, experimental data showing void reduction using preforms will also be presented.Read the full article here.Editor's Note: This article originally appeared in the May 2013 issue of SMT Magazine.