Overview Miniaturization on Large Form Factor PCBA


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Many techniques have been trialed to see which could be the best way to protect the adjacent components during the rework process. Figure 2 shows some results of a study performed to evaluate different shielding techniques. In this study no shielding, a heat shield made of ceramic filled material, a peelable solder mask over the adjacent components and a temporary heatsink were evaluated to see which would give the best results. Based on the data the temporary heatsink allowed the adjacent component down to 1.27mm (0.050”) while allowing the solder joints of the target rework component to reach reflow temperatures.

Figure 3.JPG

Figure 3: Various configurations.

This ability to maintain the adjacent component temperatures below the can allow the BGA to IC components to be placed closer together in the designs. Further advances in rework technology will need to be pursued in order to help drive the component spacing down further. Most techniques today require some sort of fixturing in order to protect or have nozzles surround the device being reworked. Laser, Vapor Phase and other techniques are being explored to help move this technology even further.

For the passive components a lot of research has been done to place these components very close together. In consumer/miniaturized products the component to component spacing is down to 0.150mm and in some cases down to 0.100mm in limited areas. Picture 2 shows a spacing matrix of 0.125mm between 01005 and 0201 style capacitors.

Picture 2.jpg

In these cases printing is a key item to achieve good yields. In Figure 4 below it shows the yield of the various spacing vs the stencil thickness being used. A thinner stencil helps create a higher yield however at 0.250mm spacing good yields can be seen for the stencil thicknesses in the study.

Figure 4.jpg

Figure 4: DPMO vs component Spacing vs Stencil thickness.

For larger form factor boards, components down to 0402 can still utilize a 125µm thick stencil and still achieve component to component spacing down to 0.250µm in localized areas.

Figure 5.jpg

Figure 5: 0402 vs 0201 vs 01005 space taken.

Some of the other key issues to be aware of is the placement sequences. In order to place the parts close together, the placement sequence needs to be able to place the shortest components first followed by the next shortest working the way up to the tallest components. This will help prevent the placement nozzle from disturbing the placement of the component already placed on the PCBA.

Finer pitch components

One last way higher density on a PCB can be obtained is through the use of components with finer pitch. Today the use of 0.4mm pitch bottom terminated components and chip scale packages are being used on the larger format boards. One reason they are being used has to do with the availability of these types of components. The consumer (smart phones and others) are using a large volume of the components such as memory which are also desirable to be used in server, storage and other infrastructure types of products. The same concens exist on these finer pitches that currently have been discussed and that is the ability to print these fine pitches consistently. Moving to the thinner stencil help alleviate this concern and allows good consistent printing of solder paste to be able to be done.

Along with finer pitch components some designs want to use the package on package (PoP, Picture 3) technology where the packages are stacked during the SMT process. This process has been around for 10 years and is well understood.

Picture 3.jpg

The key factors are the component warpage and the use of nitrogen in reflows to minimize the potential for open solder joints. One of the limiting factors is the lack of inspection techniques for these stacked solder joints. Current automated x-ray inspection systems are limited in the capability to inspect solder joints on a separate z plane. However, work is being done to address these issues. Inspection is a key element in the process to help ensure that the solder joints are robust for the long term reliability that the larger form factor products usually will have.

Another concern for the fine pitch process is the printed circuit board itself. With the unpredictable shrinkage of the PCBs, this can cause issues with the printing due to alignment of the stencil to the PCB. The stencil is typically made to the gerber and not adjusted for any shrinkage of the PCB after baking or reflow. The amount of shrinkage can cause the board pads to no longer align to the stencil apertures. One way this is overcome is by creating a stencil based on the batch of PCB received and adjusting the fabrication of the stencil to match those PCBs. The pick and place can make adjustments to the x,y position based on the fiducials and apply a scaling. The stencils do not have this ability as they are fixed and the only alignment that can be done is to create a best fit location based on fiducials. In some cases the outer components can be misaligned in the stencil print process.

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