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Most of today’s electronic products consist of traditionally made parts: plastic molded housings containing PCBs with soldered THT and SMT components. In many cases, even the design of a product is based on the electronics that should fit inside! Shouldn’t it be the other way around? Shouldn’t the electronics be a part of the design based on ergonomics and aesthetics?
The only way to establish this is by somehow placing the electronics inside the design. This dictates that the substrate on which the components should be placed would be the inside of the designed housing itself. Since most housings are of a 3D shape, the components might need to be placed under an angle, but moreover, the interconnections between the components can no longer be on a separate piece of FR-4 material.
Also, if we look at the advanced 3D chip packaging level, interconnects are an important driver. This holds for through-silicon vias (TSVs) for chip stacking, but also for other interconnects steps like redistribution layers and solder bumps. Especially in applications with a low number (<100 mm-2) of relatively large features (10–100 μm diameter) with high aspect ratio (up to 1:10), conventional plating processes are slow and become cumbersome with increasing aspect ratio, thus becoming cost-ineffective. Hence, industrially feasible, alternative directwrite processes are of interest for advanced interconnects.
A general trend in IC manufacturing, driven by ever-increasing performance and form factor requirements, is that chips are becoming more and more integrated into very thin packages. Integration takes place at the chip level, on silicon interposers, and also by integrating ultrathin chips into foil based devices.
Editor's Note: This column originally appeared in the January 2015 issue of The PCB Magazine.