Advancement of SPI Tools to Support Industry 4.0 and Package Scaling
During the past decade, consumer electronics and personal digital devices, in particular, have shrunk in size but have added significant computing power and capabilities. To enable this digital revolution, the SMT industry has driven towards thinner BGA packages with finer ball pitch and smaller solder ball sizes.
Thinner and finer pitch packages are increasingly prone to warpage with less SMT process yield margin, which require intricate stencil design with varying solder paste volume deposits. Increased functionality has driven footprints to be asymmetrical with SMD (solder masked defined) pads, which are typically smaller with circular and oval layouts. This has fueled a need for highly accurate and smaller solder paste deposits for increased SMT yield margin and solder joint reliability. Additionally, with the introduction of Industry 4.0 and Smart Factory solutions, it is imperative that data collection must be accurate to influence the appropriate forward and backward feedback information for monitoring, tuning, and automatic adjustments. There is concern that the current industry wide inline solder paste inspection (SPI) tools are operating as gross inspection tools instead of capable metrologies.
This paper evaluates the current state of inline SPI tools from multiple vendors for solder paste measurement accuracy and capability. A measurement capability analysis (MCA) was carried out against a golden metrology tool across a range of volume deposits. Results from the study will highlight the accuracy bias deviations and repeatability of current SPI tools against low volumes deposits and showcase the current gap in the SMT industry.
Figure 1: Industry package form factor roadmap (reproduced with permission from ASM).
The SMT industry and Intel’s roadmap are driving to thinner and smaller packages with finer pitch and smaller ball sizes, as shown in Figure 1. This also translates to significantly smaller volume solder paste deposits largely below 250 cubic mils, as shown in Table 1 (highlighted in red). Table 1 lists calculated theoretical volumes for small pad sizes. As BGA solder ball pitch decreases, the contribution to the solder joint from solder paste increases (as a function of solder joint integrity). At 0.4-mm pitch, printed solder paste contributes ~28% of the total solder joint volume post reflow, approaching 30% at 0.3-mm pitch, as shown in Figure 2. Data shown in Figure 2 is obtained from theoretical calculations.
Table 1: Solder paste volumes for fine-pitch packages.
Controlling and accurately measuring solder paste volume is becoming more and more critical as pitch is reduced further. Also, thinner packages prone to warpage need highly accurate solder paste volume deposits to increase yield margins.
Typical SMT industry upper and lower thresholds for solder paste volume as measured by SPI tools (±50%) are wide and will mask accuracy with a false pass. To illustrate this point further, consider an SPI measurement scenario shown in Figure 3.
For a target solder paste volume of 50 cubic mils, the SPI lower and upper control limits of ±50% will be 25 cubic mils (LCL) to 75 cubic mils (UCL). Let us consider an SPI accuracy of ±20%. For an actual deposit of 30 cubic mils and factoring the accuracy bias error, the measured value of deposit by SPI can be anywhere from 24–36 cubic mils. This is shown by two arrows from the actual value. If SPI reads 24 cubic mils, it will be below LCL and report it as insufficient. This will lead to a false call and print downtime and prompt an unnecessary change in the printer setting.
Figure 2: BGA pitch vs. printed solder paste contribution to the total solder joint volume post reflow (%).
Currently, inline SPI tools in the industry are marketed as an inspection tool instead of a metrology-grade tool. Frequently, gage R&R studies using NIST or equivalent calibrated standards are marketed based on their repeatability and reproducibility, while accuracy bias is not reported. The smart factory (Industry 4.0) initiative will drive a need for higher inline SPI accuracy once fully deployed across SMT. Again, this drives a critical need for accurate inline SPI measurement, especially for low-solder paste volume deposits.
In our literature survey, we also found that very few reports exist on the topic. Shea, et al.  reported significant differences in SPI accuracy. According to their study, SPI machines always returned values lower than the weight test results. A few other reports and white papers [2–4] from SPI vendors—such as Vi TECHNOLOGY, CyberOptics, and Marantz Electronics—emphasize the need for SPI accuracy. Chandru, et al.  also reported on SPI accuracy and suggested a better offline scanning confocal microscope for more accuracy below 200 cubic mils.
With the previously mentioned drivers in mind, we set out to gauge the current industry-wide state of inline SPI tools vis a vis solder paste measurement accuracy of low-volume deposits. We tested inline SPI tools from multiple vendors (A through E), as shown in Table 2. For vendor A, two tools were evaluated: in-house version tool A and an improved version of the tool labeled A+. Total combined market share of the vendors in Table 2 equates to >80% of the North American SPI tools market .
Figure 3: Solder paste measurement scenario for low-volume deposit considering accuracy bias of SPI.
Test Vehicle Preparation and Characterization
To compare SPI measurement accuracy from different SPI vendors, we created a golden reference board (GB). GB was first thoroughly characterized in-house using a golden reference tool (GT). The GB design is shown in Figure 4. It is a 10-layer, 32-mil PCB and consists of ball grid array (BGA), passive, and quad flat package (QFP) pad structures. Pad structures for all three components are a mix of solder mask defined (SMD) and non-solder mask defined (NSMD) pads. BGAs are designed for a 3-mil stencil print from AR 0.75 to AR 0.33 and air gap of 4 mils and 5 mils.
Table 2: Inline SPI tool vendors and tool camera resolution.
To begin with, the bare GB was characterized in the GT. Next, using a DEK Galaxy printer, we printed the GB using a 3-mil, stainless steel, laser-cut nanocoated stencil. SAC305 Type 5 solder paste was used to print on the GB. Solder paste deposits were dried by heating at 150°C for 20 minutes. This was done to drive out volatiles and solidify the shape of deposit for multiple measurement use. After print and drying, SPI was performed using in-house inline SPI tool from vendor A and the GT. Locations are selected from BGA, passive, and QFP pad structures. Pad structure, with and without traces, was also included (where available) in comparison. Solder paste volume on the PCB ranged from 0–900 cubic mils.
This GB was then sent to selected inline SPI vendors (A through E) for SPI measurement. After the GB was returned, it was re-measured in the GT to verify the integrity of the solder paste deposits.
Accurately measuring solder paste deposits’ height and volume depends on several factors, such as the imaging sensor’s resolution, PCB surface undulations, height threshold settings, the PCB’s optical characteristics, and the post-processing algorithm that computes height and volume. A recent paper  describes in detail all of these in addition to proposing a better alternative procedure for measuring solder paste volume.
Figure 4: Design image of golden reference board (red: BGA pads, blue: QFP pads, green: passives).
Measuring solder paste deposit accurately is not an easy task. First, the PCB surface is not smooth; it can have local warpage, undulations on surface, etc. Second, the solder paste deposit location on the metal pad is a mix of three intersecting surfaces: metal pad, solder Mask, and FR-4 PCB material. This complicates identifying and setting up a reference plane for measurement. Third, the solder paste deposit itself is not a perfectly defined cylinder or cube shape. SPI tools use white light and/or laser light to measure deposits. A phase-shift, moiré interferometry technique is widely used. White light from projectors is passed through gratings to form interference fringes. It is shone upon the uneven surface of the solder paste deposit, and the image is captured at known angles.
The shift in the projected interference image is measured using a CCD camera, and basic triangulation mathematical techniques are used to calculate the height of the solder paste deposit. The pad area of the solder paste deposit is broken down into pixels, and the height of each pixel is determined. The size of each pixel depends on the camera resolution being used. Individual pixel measurement is statistically evaluated to obtain the height of the deposit on a particular pad . To overcome shadow problems, certain vendors use dual projection or more for uniform illumination of the deposit. Besides moiré interferometry, laser triangulation is also used by certain vendors to measure the Z-height of the PCB pad/solder paste deposit.
The exact height of the metal pad with respect to a reference plane is difficult to determine. Most SPI vendors end up setting thresholds (the industry specification is around 40 microns) below which measurement is ignored. For more accurate and slower measurement route, the bare PCB is run through the SPI tool first before printing. PCB warpage, surface morphology, and pad height are captured and taught. Next, a pasted PCB is run, and the bare PCB pad height is subtracted from the solder paste height calculation.
GT Measurement Basics
The GT is a non-contact profilometer with an X-Y motion system. It uses a chromatic white light sensor. In brief, the working principle is as follows. Polychromatic white light composed of several wavelengths is focused on the object surface. It is well known that different wavelengths have different focal lengths. For any point on the sample surface, one reflected wavelength component of the white light will have the maximum intensity relative to all other wavelengths. The spectrum of reflected light is analyzed using a spectrometer. If a particular wavelength is exactly focused on the target, the spectrum has a maximum at this wavelength and shows a peak. To each wavelength, a specific distance to the target is assigned by calibration. Therefore, by knowing the wavelength with the highest intensity, it is possible to accurately map the height profile point by point over the entire sample surface.
Figures 5a and b: Variability chart for bias % for Phase 1 volume range.
Key differences are to be noted between the inline SPI tools and GT. The GT is a lab-scale, metrology-grade tool with a focus on accuracy and resolution vs. throughput. Its height and depth resolution is ~160 nm, and spatial resolution could be down to 1 micron. The GT runs much slower than SPI tools. Inline SPI tools are automated tools with a focus on speed and throughput. These tools are gross inspection tools. The GT and SPI machine use completely different optics and technologies to perform the measurements.
Results and Discussion
The GB was measured on the GT and then sent to various SPI vendors (A through E) for measurement. All of the vendors were provided the same board and stencil Gerber data for recipe creation and measurement. Accuracy bias in volume % measured was calculated and compared using the following formula: accuracy bias % = (Vol GT – Vol X)*100/Vol GT, where X denotes different SPI vendors. All of the SPI tools evaluated in this study are based on shadow-free moiré technology. Camera resolution is different for each vendor, as noted in Table 2. Besides camera resolution, there are other hardware and compute algorithm differences among SPI vendors A through E. Select pads from BGA, QFP, and passive components were used for accuracy bias measurement.
Solder paste volume of these components is in the range of 0–900 cubic mils. Solder paste volume ranges were divided into three phases—Phase 1: 0–100 cubic mils, Phase 2: 101–250 cubic mils, and Phase 3: 251–900 cubic mils. Allowable accuracy bias variation criteria were kept at ±20%. Accuracy bias for Phase 1 volume range is plotted in Figures 5a and 5b. We can clearly observe that for very small paste volume deposits between 0–50 cubic mils for passive and BGA components (Figure 5a), all of the vendors except A+ show a higher bias variation than 20%. Tool A+ is a newer version with a much higher resolution camera and software upgrades from vendor A. Also, the measurement is performed without any threshold setting on the A+ tool. Tools A and B perform worse for small-volume measurements with a huge accuracy bias %. For the 51–100-cubic-mil solder paste volume range shown in Figure 5b, only tools A+ and C meet the criteria; the rest are failing either for a positive or a negative bias percentage.
Figures 6a, b, and c: Variability chart for bias % for Phase 2 volume range.
Phase 2 solder paste volume ranges are further broken down in three subparts for analysis, as shown in Figures 6a, b, and c. Part 1 varies from 101 to 150 cubic mils. Only tool A+ meets the criteria as evident from the plot. Part 2 varies from 150 to 200 cubic mils. In this range, only tool A+ is able to fully meet passing criteria. Tools B and C are barely failing criteria for BGA and QFP pads, respectively. Part 3 varies from 201 to 250 cubic mils. Tools A, A+, C, and E meet the passing criteria.
Similarly, Phase 3 solder paste volume range is broken down in two subparts, as shown in Figures 7a and b. Part 1 varies from 251 to 499 cubic mils. Most tools are able to meet the passing criteria except for tool D, which is barely failing the upper limit. Part 2 varies from 500 to 900 cubic mils. We observe almost all of the tools passing the criteria except tool C, which is barely trailing by a few percentage points on the upper limit of the passing criteria.
As we move from low- to higher-volume paste deposits, more tools are able to meet the passing criteria. In our industry survey with various SPI vendors, we found that when these tools are calibrated using NIST or equivalent targets for qualification, more often than not, the minimum volume of structures on the NIST standard is ~500 cubic mils or higher. This explains large accuracy bias observed for low-volume solder paste deposits below 250 cubic mils. Only tool A+ with the highest resolution camera is able to meet the passing criteria.
Another point to be noted is that the majority of these tools (except A+ and B) employ Z-height threshold >10 um to estimate. They ignore the height and volume of the metal pad in the solder paste deposit calculation. For large volume deposits, metal pad volume contribution will be small and may not affect accuracy bias as much. Software algorithms and implementations can vastly vary from vendor to vendor. It is clearly evident that threshold-free measurements, along with correct hardware, is more accurate for low-volume solder paste deposits.
Figures 7a and b: Variability chart for bias % for Phase 3 volume range.
Conclusions and Recommendations
The results of the study showed increased sensitivities to low solder deposits of less than 250 cubic mils across SPI equipment employing threshold algorithm values >10 µm and spatial resolution ≥7 µm. Evaluations on a 5-µm resolution system (A+ tool) employing 0-µm threshold algorithms were found to have acceptable accuracy deviations of less than ±20%.
To improve inline SPI accuracy for low solder paste volume deposits, SPI vendors must consider calibration of SPI tools with lower-volume (below 200 cubic mils) NIST or equivalent standards. For fine-pitch applications, as well as lines configured for Industry 4.0, accuracy should be a consideration for SPI tool selection.
The authors would like to acknowledge the Intel internal team and the engineering teams at various SPI vendors for their help in completing the SPI measurements and answering inquiries about the tool capabilities.
- C. Shea, and R. Farrell, “Stencil and Solder Paste Inspection Evaluation or Miniaturized SMT Components,” Proceedings of SMTA International, 2013.
- J. M. Peallat, “New Opportunities for 3D-SPI,” www.circuitnet.com, 2008.
- CyberOptics, “‘True’ Heights Measurement in Solder Paste Inspection (SPI),” www.cyberoptics.com, 2013.
- H. Biemans, “5D Solder Paste Inspection: Merits Beyond 3D Technology,” Global SMT & Packaging, 2011.
- C. Periasamy, and S. Walwadkar, “A Scanning Chromatic Confocal Microscope for Accurate Off-Line Solder Paste Volume Measurement,” Proceedings of SMTA International, 2017.
- Intel internal survey report.
This paper was originally presented at the Technical Proceedings of SMTA International 2018.
Abhishek Prasad is a process engineer at Intel Corporation.
Larry Pymento is a senior process/technology development program manager at Intel Corporation.
Srinivasa R. Aravamudhan is a process technology development engineer at Intel Corporation.
Chandru Periasamy is a packaging R&D engineer, metrology and mechanics, at Intel Corporation.