The Small Component Printing Challenge


Reading time ( words)

Small components, current and future form factors, present challenges to the solder paste printing and SMT assembly process. These challenges exist for tools including stencils, squeegee blades, and under board support. They also pose troubles for materials including solder paste and the PCB; and equipment including stencil printing equipment and pick-and-place equipment. William Coleman, Ph.D., Photo Stencil, considers the challenges in two categories: positional accuracy and the solder paste printing process. Challenges When Printing Small Pads

But first, what are some of these very small components and why are they troublesome? The challenging form factors include 0.3-mm-pitch chipscale package (CSP) devices, 0.3-mm-pitch quad flat pack no lead (QFN) devices, and 01005 passives.

Positional accuracy is a challenge for the PCB, the stencil printing equipment and paste-print stencil, and the pick-and-place system. The aforementioned small devices typically have pad sizes on the PCB in the 125-µm (5 mil) to 200-µm (8 mil) range. The positional tolerances add up; each of the aforementioned sources have an effect. With a 125-µm (5 mil) pad width, it is not difficult to imagine printing a solder brick up to half of a pad off center. This can easily cause shorts, opens, and tombstoning. The problem is less severe for small PCBs where the small devices are relatively close to each other. It becomes more troublesome for larger boards where the small components are spaced farther apart. What are some solutions for the positional accuracy issue? PCB suppliers and stencil suppliers will need to offer positional accuracy data with the delivered product. After reviewing the positional data, it may be necessary for the SMT process engineer to go back to the stencil supplier and have the Gerber data scaled to match the PCB.

The solder paste printing process is a challenge because small components coexist on the PCB with more conventional SMT devices like 0.5-mm quad flat packs (QFP) and 0603 and 0805 passive devices. These larger components require more solder volume to achieve good solder fillets compared to the smaller ones. Overprinting — making the stencil aperture larger than the PCB pad — is an option but has limitations due to lead density. Achieving acceptable fillets with sufficient solder paste volume for normal-sized SMT devices normally requires a stencil thickness of at least 100 µm (4 mil). However, a stencil of this thickness presents a printing challenge for the small devices with apertures in the range of 125- to 200-µm.

Stencil printing is a two-phase process. First, the solder paste is forced into the stencil aperture as a squeegee blade wipes the solder paste across the surface of the stencil. Second, the solder paste is transferred from the stencil aperture to the PCB pad as the PCB is separated from the stencil. As I have mentioned previously, I like to think of this paste transfer process as a tug of war: the aperture walls are trying to hold back the solder paste within the aperture while the pad on the PCB is trying to pull the paste out of the aperture. The ratio of the inside aperture wall area to the area of the pad beneath the aperture opening determines who will win this tug of war. Over the years, the stencil solder paste printing industry has established some guidelines for this area ratio, or area of pad under the opening of the aperture/area of the aperture walls. A ratio of 0.66 was established for standard stencils and recently, in IPC 7525 rev A, a ratio of 0.5 was established for certain special stencils with smooth aperture walls. However, the area ratio for small component using a 100-micron (4 mil) thick stencil is in the range of 0.4 to 0.5, well below the recommended range. Herein lies the challenge.

Industry Research on the Problem

Recently, at SMTA International (SMTAI) 2009 in San Diego, CA, six technical papers were presented in two sessions dealing with this challenge. Session 32 at IPC APEX EXPO 2010, taking place this week April 6-9, has three papers also discussing this subject. I believe there are two options to resolve the printing challenges: step stencils or reduction of the acceptable area ratio down to the 0.4 range. The step stencil is a brute force solution and has definite limitations, namely the spacing between apertures that lie in the step to apertures that lie out of the step. Using a two-print step stencil, aperture spacing (first print aperture to second print aperture) as low as 0.4 mm (16 mil) has been reported.1 Work continues in several areas to reduce the acceptable area ratio to 0.4. Solder paste materials, special squeegee blade systems, and stencils with special coatings on the aperture walls all have potential to contribute to the final solution.

REFERENCES:

1. “Stencil Design when 01005 and .3 mm pitch uBGA’s coexist with RF Shields,” William E. Coleman, Ph.D., S23 Paste and Printing II, IPC APEX 2009.

William E. Coleman, Ph.D., is an SMT Editorial Advisory Board member and vice president of technology at Photo Stencil. He is Chairman of IPC's Stencil Design Guidelines Subcommittee 5-21e, and a member of SMTA and IEEE. Coleman has presented Technical Stencil Design reviews to SMTA chapters globally. He may be contacted at (719) 535-8528; bcoleman@photostencil.com.

Read his recent articles:Duplicate Exact from the Stencil Perspective Stencil ControlsTechnology Drives New Stencil ApplicationsRework Challenges, Rework Solutions

SMT April 2010

Subscribe

Join the PennWell SMT Group on LinkedIn

Become a Fan on SMT's Facebook Page

Post your electronics manufacturing, SMT-related material to the #SMT community on Twitter. Use the #SMT hashtag.

Share

Print



Copyright © 2019 I-Connect007. All rights reserved.