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To Void or Not to Void?
December 31, 1969 |Estimated reading time: 6 minutes
During its three-year, multi-million-dollar reliability study on lead-free solder, the IPC Solder Products Value Council (SPVC) found that solder voiding has no impact on solder joint reliability. This article highlights results of the study.
By Tony Hilvers, Paul Lotosky, Greg Munie, Karl Seelig, John Vivari, and George Wenger
The IPC Solder Products Value Council (SPVC) conducted a reliability study to determine if the tin/silver/copper (SAC) alloy family of lead-free alloys had equivalent performance in assembly, metallographic analysis and baseline characterization, thermal shock, and temperature cycling. The SPVC concluded that all three SAC alloys had comparable performance, and the council recommended SAC 305 as the default lead-free alloy for use by the electronics industry.
A key by-product of this research was that voids were detected in the analysis of completed test assemblies using the SAC lead-free solder paste. The voids were marked on the assemblies but not repaired, and test boards were subjected to thermal shock and temperature cycling. As a result, and perhaps as an unintended benefit of the research, voids were subjected to shock and temperature-cycle testing. The SPVC compared solder joint void performance.
The Solder Joint Debate
Voids in solder joints are empty spaces within the joint. The consensus among the electronics assembly industry is that voids, usually detectable by X-ray imaging, could be a rejectable condition - especially when the size of the void exceeds 25% of the solder joint, and especially when voids appear in BGAs.
The electronics assembly industry has debated solder joint voids since there was electronic-grade solder. This debate is heating up, however, with the transition to lead-free solder. The reasons for this are that lead-free solder joints experience voiding more than tin/lead (SnPb) solder; and SAC alloys have a higher percentage of voids than other lead-free alloys.
Test Regimen
Two lead-free test assemblies were used in the IPC SPVC test program: lead-free test assembly A* and B.** Both test vehicles were assembled with blind samples of solder paste - each with the same flux system but unique alloys. The objective of the build was to gauge statistical differences between alloys. Processes were not optimized to each paste.
In lead-free test assembly A,* voiding greater than 25% of the area was observed with all three SAC-alloy solder paste assembled boards, and specifically for the 0.5-mm-pitch CSP84 lead-free components. For SnPb-assembled boards, there was evidence of voiding, but less than 25% void area on the 0.5-mm-pitch, SnPb-assembled CSP84 components.
On lead-free test assembly B,** voiding greater than 25% was observed with all SAC alloys. The PBGA196, C-CSP224, and wafer-level CSP8 on assembled boards showed voids greater than 25% on almost all packages.
To determine the effect of voids on solder joint reliability, the IPC SPVC test regimen consisted of conventional, industry-accepted thermal cycle and thermal-shock exposures. Environmental exposures were conducted on both sets of test boards with functional monitoring during the exposure. Test vehicle sets included assemblies from two companies, each of which provided four groups of 40 test panels representing the three SAC solder alloy compositions, as well as a baseline eutectic (SnPb) solder composition. One board from each set was used for destructive metallographic analysis and not included in the thermal cycling study.
The thermal-cycle profile proposed reflects the IPC test regimen and consists of a low-temperature (0°C) soak for ten minutes with a temperature ramp-up to 100°C with a high-temperature soak of ten minutes prior to a ramp-down to the low temperature. The total cycle typically takes around 60 minutes. The cycle time is a function of the chamber time to temperature and related temperature stabilization of the test article.
The thermal-shock test profile is similar to the JEDEC-prescribed exposure, and consists of a low-temperature (-55°C) soak for five minutes, followed by a transition to the high temp (125°C) with a high-temperature soak for five minutes, then a final transition back to the low temperature. This cycle was repeated continuously. Total cycle time was about 20 minutes.
Metallographic analysis of every 500 thermal cycles also was conducted on representative samples from the two sets of tests vehicles.
Test Results
The study compared the results of X-ray analysis for voids, failures in thermal cycling up to 6,000 cycles, thermal shock, and the metallographic examination of both failed and functional solder joints after thermal exposure. From these comparisons, and several different statistical methods comparing thermal-failure data to void location and size, it is clear that voids had no influence on solder joint integrity.
Transmission X-ray imaging was performed on each component on every board that was removed after every 500 cycles. The images revealed that solder joint voiding was more extensive in SAC-alloy solder joints than SnPb solder joints. Solder joint voiding, in number and size, in the CSP84 package solder joints was more extensive than the other area-array packages. Comparisons of voiding with cross-sections of temperature-cycled packages did not show any obvious correlation of voiding to interconnect failure. For example, the cross-sectioned SAC 305 solder joints of the test assembly board A* showed large voids, but no indication that the voids contributed to interconnection failure - even though this package was subjected to 4,500 temperature cycles (Figure 1).
Figure 1. X-ray and cross-section of test assembly board A - C11 SAC 305 assembled U313 CSP84, row 12.
There were enough temperature-cycle-induced creep-fatigue solder joint failures of the 0.5-mm-pitch 84 I/O CSP packages on lead-free test assembly A* to obtain 2-parameter Weibull slope (Beta) and characteristic life (Eta) values. A Weibull plot of failure distributions for the CSP84 packages is shown in Figure 2. Weibull distributions show that the SAC-alloy solder joints had a longer characteristic life than the SnPb solder joints (4,713 to 6,810 cycles for SAC alloy compared to 1,595 cycles for SnPb). However, transmission X-ray images and cross-sections conducted on the non-monitored boards every 500 cycles showed considerably more and larger voids in SAC-alloy solder joints than SnPb solder joints. Because of this, each CSP84 package was inspected using X-ray upon completion of the 6,000 temperature cycles. An attempt was made to correlate voiding with cycles to failure. Figure 3 shows Weibull and Eta values. These statistics are based on the 24 CSP84 packages that were part of the IPC SPVC reliability test, as well as the 60 CSP84 packages that were part of the assembly A reliability test. In an analysis, there were large voids in the SAC387 solder joints assembled using the common reflow process. However, there was no significant difference in the characteristic life of the solder joints.
Figure 2. Weibull 2-P distribution for CSP84 packages on test assembly board A.
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Figure 3. Scatter plot of cycles to failure vs. voids greater than 25% of area.
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Conclusion
Data from the IPC SPVC reliability study on SAC alloys have been used to compare voids in SAC interconnections and thermal cycles to failure. Eight separate methods of statistical analysis (boxplot, one-way ANOM, main effects plot, matrix plot) were used to compare cycles to failure at both voids greater than 25% of the interconnection area and total voids. Void distribution vs. failure cycles shows that voids did not impact solder joint reliability.
Based on the comparison of the number and size of solder joint voids to interconnection failure in thermal-cycling data, it was concluded that there is no evidence that the type of solder joint voiding observed in SAC-alloy solder joints had any significant affect on solder joint reliability.
* Test assembly A from Solectron: 160 assemblies with 72 components/six-layer, 93-mils-thick PCB. ** Test assembly B from Flextronics: 160 assemblies with 260 components/double-sided PCB.
REFERENCES
- “The Effect of Voiding in Solder Interconnections Formed from Lead-free Solder Pastes with Alloys of Tin, Silver, and Copper,” is available for free at www.ipc.org, and includes statistical comparisons of voids and solder joint integrity.
Tony Hilvers, IPC VP of industry programs, may be contacted at tony.hilvers@ipc.org; Paul Lotosky, global director, technology implementation, the assembly materials group of Cookson Electronics may be contacted at plotosky@cooksonelectronics.com; Greg Munie, Ph.D., principal member, technology staff of Kester, may be contacted at gmunie@kester.com; Karl Seelig, VP of technology, AIM Solder, may be contacted at kseelig@aimsolder.com; John A. Vivari, technical service engineer, solder paste group, EFD, may be contacted at jvivari@efd-inc.com; George Wenger, principal member, technology staff, Andrew Corporation, may be contacted at george.wenger@andrew.com.