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Boundary-scan Tester Validates Features Prior to Prototype
October 18, 2005 |Estimated reading time: 1 minute
RICHARDSON, Texas — ASSET InterTech Inc.'s DFT Analyzer is said to reduce manufacturing and test costs by validating the boundary-scan design-for-test (DFT) features in a circuit-board design before prototype assembly. It also determines the extent of a design's boundary-scan test coverage, recommending changes that would increase coverage.
DFT Analyzer employs three tools at different stages in product development. First, as the schematics are being developed, the automated Checklist is used to query a designer or a design team about the testability features that have been included in the design. Also, design practices specific to the organization can be reflected in the Checklist to ensure consistency across all of a company's designs. Next, the DFT Analyzer launches the Design Validation tool after computer-aided design (CAD) information has been compiled to determine whether any pre-established DFT rules have been broken or overlooked. The tool recommends a solution if it encounters a broken rule. Lastly, Test Coverage Analysis engages during the final stages of design before first prototypes of the board are manufactured. This tool determines the extent of boundary-scan test coverage when certain types of tests, such as interconnect, memory and others, run on the circuit board. The report also contains information on which of the on-board test pads that are used by in-circuit test (ICT) system can be eliminated by substituting a boundary-scan test for the ICT operation, saving board space and reducing the complexity and cost of an ICT test fixture. The Test Coverage Analysis module also can output its results to DFT Analyzer's design browser, which graphically displays the available test coverage in a schematic view.
The final output of DFT Analyzer is a complete boundary-scan description of the design that can be imported directly into ASSET's boundary-scan test generation tool in ScanWorks, the company's JTAG system. A set of boundary-scan tests can be optimized for the first prototype boards, and then reused through the manufacturing process and into system test and field support.