Reliability Effects of Unfilled Underfill Encapsulants
December 31, 1969 |Estimated reading time: 6 minutes
This article explores the effect of an underfill encapsulant that contains no filler on board-level reliability of area array packages.
By Karl Loh and Edward Ibe
Underfill encapsulants were developed to encase flip-chip ICs. They typically are silica-filled epoxies that wick under a chip by capillary action. After curing, the encapsulant provides mechanical reinforcement to the solder joints. A flip chip has a lower coefficient of thermal expansion (CTE) than the substrate onto which it is assembled. During thermal cycling, this CTE mismatch results in movement of the flip chip, board and mechanical fatigue of solder joints. Cyclic fatiguing eventually ends in IC failure. An encapsulant’s effectiveness is measured by its ability to delay or prevent failures.
The use of underfill encapsulants has advanced to encapsulation of surface mount components such as CSPs and BGAs. These components can survive thermal cycling requirements without being encapsulated. However, they were not designed to withstand the repeated mechanical shock that is typical for several applications, such as cell phones. They also need to survive the repeated vibration and shock experienced in military and automotive electronics.
When considering CSP and BGA underfill encapsulation, the correct encapsulant to use is one that not only provides the reliability needed, but is easy to handle and process. With respect to handling and processing, parameters such as storage conditions, pot life, dispensability, underfill flow speed and cure time are paramount. In applications with a high board value, a reworkable underfill encapsulant often is used to facilitate board recovery. In such cases, the ease of rework is important. With respect to reliability, void-free encapsulation, drop test and thermal cycle life are important issues for handheld devices. For cell phones with a PCB mounted directly under the keypad, keypad actuation is vital. In automotive and military electronics, vibration and more severe thermal cycling are required.
Drop Test
In many handheld devices, a drop test is difficult to pass. Underfilling a CSP or BGA can enhance drop-test performance. In one instance, a series of drop tests were performed to assess how well underfill encapsulants enhanced performance. Daisy-chain BGAs were assembled onto a rigid board then dropped until failure (Table 1).
Daisy-chained chip array BGAs were assembled onto a 31-mil. thick, four-layer board using solder paste.* Drops were made from six feet onto a concrete floor. To accelerate the test, a 300-g weight was attached to the backside of the board. One drop-cycle consisted of two drops on each edge of the board, totaling eight drops.
Assemblies were made without underfill and with two underfill encapsulants. Encapsulant A is a flip-chip underfill that was qualified and used commercially by a cell phone manufacturer. The flip-chip underfill contains silica filler, which raises the encapsulant’s viscosity and lowers its CTE. Encapsulant B is designed specifically for CSP or BGA encapsulation and does not contain filler - resulting in lower viscosity, faster flow and higher CTE. The chemistry of Encapsulant B also yields longer pot life, easier storage and can cure in an in-line oven (Table 2).
The non-underfilled boards failed in only one cycle. The boards with components that were encapsulated with the flip-chip underfill failed in 7 drop cycles on average, 56 drops. The boards with components that were encapsulated with the CSP/BGA underfill encapsulant failed in 14 cycles or 112 drops, a substantial improvement.
Cracks that developed in the underfill and propagated into the board (Figure 1) caused failures.
Figure 1. Cracks in the underfill and PCB.
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Thermal Cycle Test
Although underfill encapsulation will enhance drop test life, it was unknown if it would enhance or damage thermal performance. To answer this, thermal cycle testing was performed on wafer-level CSPs assembled on rigid boards. A list of parts used in the thermal cycling test is shown in Table 3.
The wafer-level CSP used in this test is an IC with interconnects that have been redistributed using a benzocyclobutene redistribution layer. Unlike the BGA used in drop testing, there is no organic interposer. The stresses in thermal cycling induced by the mismatched CTE of silicon and organic laminate are similar to that of a flip chip. The difference is that ball pitch is large enough for component assembly using conventional surface mount equipment. It was judged that the mismatch in CTE between this component and the board provides a more challenging thermal cycle condition than a BGA.
Two thermal cycle conditions were used. In Condition 1, the temperature range was set at -40° to 85°C with 15 min. dwells and 15° to 20°C/min. ramps. In Condition 2, the temperature range was set at 0° -100°C with 10 min. dwells and 10°C/min. ramps. A net resistance across the entire board and through all the components of 1000 Ω was used as the criteria for failure.
Three underfill encapsulants were tested in the thermal cycling tests. The first encapsulant is Encapsulant B from the previous drop tests. The second encapsulant, Encapsulant C, is a silica-filled version of Encapsulant B. Silica was added to the CSP/BGA underfill encapsulant to determine if a lower CTE would enhance or harm thermal-cycle performance. Encapsulant D is Encapsulant A, modified to contain 50% silica. Reducing the filler content of Encapsulant A raises the CTE, but lowers the viscosity and increases flow speed. The material properties for each encapsulant and thermal cycle results are shown in Table 4.
For Condition 1, the non-underfilled boards failed early, with first failure below 1,000 cycles, mean-time-to-failure (MTTF) below 1,000 cycles and all 45 boards failing by end of test at 2,155 cycles. All three underfill encapsulants substantially improved thermal cycle performance. The only failure among encapsulated parts occurred above 1,000 cycles.
For condition 2, the test was extended to 6,123 cycles. Without underfill, first failure exceeded 1,000 cycles, MTTF exceeded 2,000 cycles and all boards had failed by the end of the test. With Encapsulant B, the first failure was about the same as without encapsulation, MTTF increased about 50% to over 3,000 cycles and about a third of the boards survived to the end of the test. With Encapsulant C, the first failure increased slightly, MTTF almost doubled (relative to non-underfilled CSPs) to 4,173 cycles and two-thirds of the boards survived to the end of test. With Encapsulant D, first failure occurred at 3,854 cycles. No other failures occurred before the end of the test, therefore MTTF could not be determined.
Figure 2. Cracks in the solder joint.
Cracks in the solder joint caused failures. Figure 2 shows a cross-section of a failed solder joint. The four corners of the cross-section are magnified and cracks are identified with arrows.
Results
The drop tests show that the use of an underfill encapsulant can enhance drop-test performance. The new unfilled underfill encapsulant yields significant improvements. Failure occurs from cracks developing in the underfill and propagating into the PCB.
Underfill encapsulants traditionally are used to enhance solder joint reliability in flip chip thermal cycling. It is understood that the CTE of an underfill encapsulant should match the CTE of the solder joint, about 26 to 28 ±/C. Therefore, flip-chip underfill encapsulants typically are filled with silica to reduce CTE. The thermal cycle tests show that the recently developed unfilled underfill encapsulant, with higher CTE, will not damage thermal cycle reliability. Under some conditions, it improves reliability. The tests also confirm that lowering encapsulant CTE improves thermal cycle performance.
Conclusion
Drop testing has shown that an unfilled underfill encapsulant developed for CSP and BGA underfill encapsulation enhances reliability against mechanical shocks; and it can yield acceptable thermal cycle performance.
While a silica-filled underfill encapsulant with lower CTE yields superior thermal cycle performance, there are significant process benefits to using an unfilled encapsulant. The unfilled underfill encapsulant has lower viscosity and density, therefore, it is easier to dispense and can flow under a device faster. This allows the use of low-cost dispensing equipment. The newly developed chemistry also yields longer pot life and easier storage and can still be cured using in-line ovens.
*Indium SMQ-92J solder paste
Karl Loh, president, Zymet Inc. may be contacted at (973) 428-5245; e-mail: kloh@zymet.com. Edward Ibe, senior development engineer, Zymet Inc. may be contacted at (973) 428-5245; e-mail: edwardibe@zymet.com.