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How Surface Finish and Solder Paste Affect Lead-free Conversions
December 31, 1969 |Estimated reading time: 8 minutes
The Massachusetts Lead-free Consortium wanted to create a database of lead-free conversion knowledge through separate and limited scope projects. Tests were conducted to determine the possibility of manufacturing lead-free PWBs with zero visual defects.
By Sammy Shina and Greg Morose
Established in 1999, the Massachusetts Lead-free Consortium assists local companies in the conversion to lead-free. The consortium was created through funding from the Massachusetts Toxics Reduction Institute (TURI), which aims to provide training and information, as well as research findings of new technologies. For nearly five years, TURI has supported research at the University of Massachusetts Lowell to investigate alternative lead-free solder processes. Massachusetts companies representing the entire supply chain were recruited. In 2004, more New England companies were added and the consortium changed its name to the New England Lead-free Electronics Consortium. The EPA provides funding under order number 4W-1362-NAEX. To date, more than 25 papers have been published or presented, some of which have been translated into Chinese, Japanese and Korean.
The Massachusetts Lead-free Consortium wanted to create a database of lead-free conversion knowledge through separate and limited scope projects, each phase building on the previous one. The group decided to use current information, and not to duplicate or re-examine concepts already established in the electronics industry. For this experiment, a thermal cycling time of 2,000 hours was used. This was considered enough to determine if any material boundary properties have changed. But it is not long enough to build reliability models based on the timing and quantities of failures. The consortium decided that accelerated tests should be performed in the next phase as an adjunct to the thermal cycling tests.
The goals of the initial testing phase were to determine if it is possible to manufacture lead-free printed wiring boards (PWBs) with zero visual defects; and if so, will pull strength after thermal cycling be comparable to that of leaded PWBs? The answer was yes. However, careful selection of solder materials and PWB surface finishes should be made. In addition, data analysis indicted that surface finish and solder paste composition are significant, while the reflow cycle attributes of TAL (time above liquidus) and reflow profile were not significant in influencing the outcome.
Figure 1. Test vehicle
These results set the stage for the second phase of testing in which five more surface finish types were selected. At this point, only the National Electronics Manufacturing Institute’s (NEMI) tin/silver/copper (SAC) solder paste alloy was used based on three lead-free solder paste suppliers (named “A,” “B” and “C”). The effect of reflow would be studied based on reflowing in both air and nitrogen. Several component types and finishes were used, including quad flat pack (QFP) and SOIC, as well as nickel/palladium/gold (NiPdAu) and tin finishes. These components were aligned in a test vehicle with SMT technology in the pull test configuration (Figure 1). A full factorial analysis was used, resulting in 30 possible test combinations (Table 1). The resulting model, based on Design of Experiments (DoE) analysis, can be reduced to study equivalent combinations of material selections. An identical set of PWBs was assembled using leaded solder paste acting as the baseline for reliability (pull tests) analysis. Separate analysis was performed for each type of component (QFP or SOIC) and finish (NiPdAu and tin).
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Experiment layout
The test PWB was laid out at one facility*, taking into account daisy-chain resistance test capabilities in some of the parts. It was fabricated with five finishes. Pastes were obtained from three suppliers and a reflow profile was developed based on the manufacturers’ product data sheets. Solder paste prints were made using a 0.006" thick stainless steel, laser-cut, electro-polished stencil. Ten percent aperture reductions were used on the fine-pitch devices. Also, PWBs were assembled on a line using a screen printer, placement equipment and a reflow oven with both air and nitrogen capabilities. The plant maintained a Relative Humidity (RH) level between 35-40%.
After reflow, PWBs were packaged in ESD bags and taken to the facility for visual inspection, guided by a certified IPC inspector/trainer. Visual inspections were: total defects, cold solder joints, non-wetting, solder balls, dewetting, bridging, pinholes, shiny appearance, smooth appearance and flux residue. X-ray radiography of the BGA solder joints was also performed. Defects were photographed and recorded. Statistical analyses were performed and significant effects were determined (Table 2). The ANOVA (Analysis of Variance) is significant for the overall experiment and for the variables highlighted with probabilities (Pr) less then 0.05.
Further statistical analysis of visual defects indicated:
- The SMOBC/HASL finish significantly differs (worse) from other finishes. The remaining four finishes were indistinguishable from each other.
- All pastes were found to differ significantly. Paste “B” performed best, but clogged the stencils. During Phase II of tests, solder supplier “B” solved this problem.
- Nitrogen performed significantly better than air.
- Solder paste “B” showed no significant difference between using air or nitrogen, while solder pastes “A” and “C” required nitrogen to reach the same level of visual quality.
Pull Tests Prior to Thermal Cycling Figure 2. Position of QFP pulls
The methodology for the tests consisted of using a pull test machine to pull the leads of an IC and record the maximum pull force. Because of the differences in pad size and component finish, the pull tests were analyzed separately for each type of IC. For the QFP (NiPdAu) components leads, six leads were pulled (Figure 2), while four leads were pulled in the SOIC 20 (NiPdAu) and the SOIC 16 (matte tin) leads (Figure 3).
Figure 3. SOIC pulls
The following six steps were taken in the pulling process:
- The PCB was loaded into the Instron machine at 45" and affixed with six screws to a specially designed hold-down fixture.
- Adjacent leads were removed (clipped) to facilitate the pulling of target leads.
- The leads that were pulled were tied through the IC leads. Music wire (0.016" diameter) was used for the QFP, and fishing line (24#) was used for the SOIC.
- A new loop was made for each IC pulled.
- The pull rate was 1" per minute, noting peak pull force.
- Fractures were inspected and the failure mode for each pull was noted. Failures caused by pad lifting were isolated, and not included in the analysis.
Pull Test - Phase II
The pull test results prior to thermal cycling were analyzed. The test concluded that pull forces are dependent on the pad size and footprint of the component used. Thus, pull forces on SOIC were higher than QFP. Surface finish has a significant effect on the pull test of leads. Of the five finishes, ENIG was significantly lower than the other finishes in both ICs pulled. OSP was significantly higher in QFP, and SMOBC/HASL was significantly higher in SOIC. The ENIG pull test became non-significant after thermal cycling. The test also showed that solder suppliers were not important in the pull tests for the two IC types. Paste “B” showed to be slightly higher in QFP and significantly higher in SOIC 20. Lastly, pull strength for nitrogen was significantly higher than air for QFP, but not significant for SOIC.
Thermal Cycling Profile
A thermal profile for temperature cycling the lead-free solder joints was selected based on maximum and minimum temperature - 0° and 100°C - with fastest possible ramp rates (up and down) at 10°C/min. to increase the effects of low-cycle fatigue and creep. Each cycle was set to one hour and dwell times were maximized for 20 minutes at high and low temperatures to allow the solder joint system to stabilize prior to reversing the temperature. The number of cycles should be balanced between the reasonable time required to show deterioration of the solder joints and the possibility of hard failures. These were set at 2,000 cycles (hours). The joints were visually inspected for cracks every 200 hours; and pull test was administered after 2,000 cycles. No humidity or power cycling were performed, and temperatures were noted (Figure 4).
Figure 4. Thermal profile for reliability testing of lead-free solder
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QFP Pull Test Conclusions
Several issues were noted when using a NiPdAu finish and examining all factors and their levels. The conditions of leaded vs. lead-free solder pastes, and conditions before and after thermal cycling were also examined. Results show that:
- Thermal cycling is significant for pull tests in most cases (23 out of 30 had lower pulls after thermal cycling).
- HASL and OSP surface finishes are significantly different in all cases. ENIG, tin and immersion silver finishes all appeared equal.
- Under certain conditions, nitrogen and some solder suppliers are not significant.
- When using solder supplier “B” with air, leaded and lead-free solders are equivalent.
SOIC Pull Test Conclusions
Using solder supplier “B” and air, there were no statistical differences noted in both leaded and lead-free in all factors and levels of SOICs with a tin component finish. Other suppliers were not tested in the matrix. Tests concluded that for SOICs with a NiPdAu finish, thermal cycling is not significant for pull tests. Two surface finishes, HASL/higher and ENIG/lower, were borderline significant prior to thermal cycling. But all surface finishes were equivalent after cycling. It also appears that only the solder suppliers are significantly different. However, surface finish and nitrogen are not significant. Results did not change statistically after thermal cycling, regardless of the solder supplier. Additionally, only ENIG changed statistically (better) between leaded and lead-free boards, when using solder supplier “B” and reflowed air.
Testing and Research - Phase III
The Massachusetts Lead-free Consortium is planning to roll out its next phase of testing. Phase III testing and research will focus on the manufacturing issues of lead-free implementation in production. Prior results will be incorporated into the material and process selection of the tests. New consortium members were added to provide resources and background to volume production application of lead-free. The consortium expects to finish the research by the summer of 2005.
* MA/COM, Lowell, Mass.
Sammy Shina, Ph.D., a professor of mechanical engineering at the University of Massachusetts Lowell, may be contacted at (978) 934 2590; email: sammy_shina@uml.edu. Greg Morose, project manager, the Massachusetts Toxics Use Reduction Institute, may be contacted at (978) 934-2954; email: gregory_morose@uml.edu.