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Preventing Contamination with Process Optimization
December 31, 1969 |Estimated reading time: 7 minutes
Having contamination destroy PCB reliability can be prevented with tests that ensure process control and optimization.
By Graham Naisbitt
Reliability problems stemming from ionic and non-ionic printed circuit board (PCB) contamination traditionally were only problems in the high-reliability, safety-critical sector. However, such contamination is a growing problem in more mainstream manufacturing. This is because of the relentless trend toward miniaturization in PCB geometries and component packaging styles, and in particular lower operating voltages. Keeping contamination at safe levels on an assembled board, however, demands a high degree of process control and optimization and a thorough understanding of contamination test methods (Figure 1).
The reliability demanded of safety-critical applications, where lives are at risk if electronics assemblies fail, is beyond that considered acceptable for everyday products such as PDAs or cellular phones. To achieve near-perfect field reliability levels, however, manufacturers of high-reliability assemblies have long used ionic and non-ionic contamination testing to finely tune and maintain optimized manufacturing processes.
Although these methods once were considered esoteric and excessive for non-safety-critical assemblies, the fine-pitch, fine-line geometries of many modern boards and the growing use of ultra-miniaturized and complex component packages has made this type of testing increasingly mainstream. Additionally, the current economic climate has focused the attention of manufacturers on rework and repair costs generated by insufficiently optimized processes and unreliable build quality, particularly the cost of field failure — the most expensive and reputation-damaging place for a product failure to occur and be rectified.
During a PCB's manufacture, from bare board to loaded assembly, it easily can undergo several process stages, each introducing both ionic and non-ionic contamination.
Ionic Contamination
Common sources of ionic contamination include etching, plating, tinning or leveling residues, poor soldermasks, undercured permanent or temporary soldermasks, dust, moisture, oil pollution from fingerprints, component packaging materials, flux from solder paste and residues from misprinted boards, and machine maintenance oils (especially from wavesoldering conveyors).
If this ionic contamination comes into contact with any form of moisture (e.g., due to a high-humidity operating environment), a chemical reaction can occur on the surface of a powered-up assembly, namely an electrochemical migration between conductive tracks (or pads) on an assembly that are designed to be electrically separate. As the two tracks pass each other they can act as anode and cathode, resulting in an electrical field. This can lead to the formation of metal ions, which under the influence of the electrical field will migrate across the board's surface from one electrode to another where they give up their charge and deposit as a metal.
As the process continues, there is a buildup of metal atoms at the second electrode that steadily grows backward towards the electrode from which they originated. This results in the formation of a tree-like branching structure — or dendrite — that can present a path of lower electrical resistance and promote current leakage across the PCB.
If the dendrite grows to completely close the gap between the tracks (or pads), it can cause anything from a short circuit between neighboring conductors (the more closely spaced, the more likely this will happen due to the smaller distance the dendrite has to bridge) to corrosion and catastrophic field failure. Equally, scientific studies have revealed that lower operating voltages actually promote dendrite formation more readily than higher operating voltages.
Non-ionic Contamination
Common sources of non-ionic contamination include leveling agents used in solder resists; wetting agents in fluxes, particularly spray ones; and cleaning formulae that contain surfactant additives, primarily those that are glycol-based and whose low surface energy allows them to penetrate board laminates and promote subsurface dendrite formation (Figure 2).
Figure 1. Electrical potential, moisture and an ionic residue increasing and decreasing these factors can best be visualized using the Venn diagram. Increasing or decreasing the diameter of the circles affects the electrochemical failure region.
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Although non-ionic contamination should not pose a threat to operational reliability, it can act as an agent for ionic contamination, further promoting the problems listed above. Because ionic and non-ionic contamination can be caused by such a large number of sources, it is a prevalent problem within PCB assembly. In addition to long-term reliability issues, it also can cause major process problems, such as unpredictable variability and defect level increases. To prevent this, PCB manufacturers can consider three well-established test methodologies. The challenge is that no one single method can be considered truly comprehensive. Therefore, manufacturers must select a combination of overlapping test strategies to continuously monitor (and optimize) their assembly process and keep contamination levels within acceptable quality control limits. This demands understanding the advantages and disadvantages of each test method:
- SEC Testing. The first test method deals with answering the perennial question with regard to long-term PCB reliability: How clean is clean? This is done by using ionic contamination testing, commonly referred to as solvent extract conductivity (SEC) and resistivity (or resistance) of solvent extracted (ROSE) testing. In its simplest form, SEC testing involves washing a component or assembly with a test solution of isopropanol and de-ionized water, generally in a volumetric ratio of 75:25 to dissolve the contaminants and measure the resistivity of the collected washings.
The change in resistivity of the test solution can be related (by a complex curve fitting algorithm) to the equivalent average weight per unit area of sodium chloride (NaCl) that must have been present on the surface of the specimen immediately prior to testing to produce that change.
Such testing can be performed before manufacturing to test the cleanliness of incoming boards and components, during manufacturing as a process control tool, and after manufacturing at the final assembly and cleaning stage to monitor overall process and cleaning quality. Additionally, bare board manufacturers commonly test after the fabrication process prior to product shipment.
The drawback to this is twofold: first, prevailing specifications that stem from the U.S. military many years ago suggest a pass-fail level of 1.5 µg per cm2 of NaCl equivalents. This implies that it is acceptable to leave up to that level on every square centimeter of an assembly. However, with modern miniaturized circuitry, this level would almost certainly be too high. As a result, the pass-fail criterion becomes empirical and subject to thorough testing on an individual assembly basis. But as a rough guide, a figure of around 0.2 µg per cm2 (i.e., 7.5 times lower) commonly is used. The second drawback is that it is testing only for ionic contamination and will not detect non-ionic contaminants. To detect the latter, another technique — ion chromatography — may be used.
- Ion Chromatography. This allows an analysis to be made of precisely what types of contaminate are present on an assembly's surface. A specialized resin removes contaminants from a test solution taken from a prepared sample. These contaminants then are analyzed to reveal present trace elements.
The drawback of ion chromatography is that while it will reveal exactly what contaminants are present on a board, it will not determine whether the end product will be reliable because some contaminants may not be harmful to operational reliability and can be left safely on a board. It also is a very exacting scientific method that demands expensive equipment and requires extensive user training to interpret the test result data accurately.
- SIR Testing. The third technique is surface insulation resistance (SIR), which has evolved through thorough scientific research, such as the European project headed by the U.K. National Physical Laboratory (NPL). SIR testing typically is performed on completed assemblies over-mounted on industry-standard test board coupons containing patterns, generally interdigitated combs, designed for the purpose. This procedure has been found to most closely represent an actual manufacturing process.
In operation, the insulation resistance of the test assembly pattern is monitored at pre-set (specification defined) intervals typically for 72- to 168-hour durations, as temperature and humidity are varied. Monitored resistance levels may range from 106LogΩ to 1014LogΩ for applied test voltages (again specification-dependent) ranging from 5 to 100 V, with a +5 to -50 V bias.
Figure 2. Dendrite formation.
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If the test substrate has a low ionic content, the measured SIR will remain "acceptable." If the ionic content is high, however, "unacceptable" leakage currents, corrosion and metal migration, or dendritic growth will occur. Each SIR test method, standard or specification (that in addition to the draft IEC 61189-5 includes ISO 9455-17, J-STD-001C, IPC-TM-650 2.6.3 and 2.6.3.3, and Bellcore) defines what is acceptable and unacceptable. If SIR testing is used, it is easy for a manufacturer to assess how different process chemistries at each stage of a manufacturing process react with each other — in other words their synergistic compatibility — and to ensure that these remain within acceptable limits.
Conclusion
By using contamination testing, manufacturers can ensure process stability by a process of ongoing optimization and fine-tuning. Moreover, they can identify the manufacturing stages where most ionic contamination is being introduced and rectify the problem quickly. In doing so, they can maximize their manufacturing yields and minimize the cost of rework, repair and premature field failure.
Graham Naisbitt, managing director, may be contacted at Concoat Systems, Millfeld House, Fleet Rd., Fleet, Hants GU51 3OF, United Kingdom, 44 (0)1252 813706; Fax: 44 (0)1252 813709; E-mail: sales@concoat.co.uk.